[PATCH] D74401: [MLIR] Add std.atomic_rmw op

River Riddle via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Mon Feb 24 16:45:38 PST 2020


rriddle accepted this revision.
rriddle added a comment.
This revision is now accepted and ready to land.

Thanks!



================
Comment at: mlir/include/mlir/Dialect/StandardOps/IR/Ops.td:273
+  let assemblyFormat = [{
+    $kind $value `,` $memref `[` $indices `]` attr-dict `:` `(` type($value) `,`
+      type($memref) `)` `->` type($result)
----------------
nit: Can you keep these two lines aligned?


Repository:
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CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D74401/new/

https://reviews.llvm.org/D74401





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