[PATCH] D75033: [MachineVerifier] Doing ::calcRegsPassed over faster sets: ~15-20% faster MV
Roman Tereshin via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Mon Feb 24 15:33:29 PST 2020
rtereshin marked 2 inline comments as done.
rtereshin added inline comments.
================
Comment at: llvm/lib/CodeGen/MachineVerifier.cpp:2131
+ for (unsigned Reg : FromRegSet)
+ if (Register::isVirtualRegister(Reg)) {
+ unsigned Index = Register::virtReg2Index(Reg);
----------------
rudkx wrote:
> You could reduce indentation here by adding braces around the body of the `for` loop, inverting the condition, and using `continue`, per https://www.llvm.org/docs/CodingStandards.html#use-early-exits-and-continue-to-simplify-code.
I could indeed! The body has started as one-liner, then grew, and I haven't changed this.
I'll update it that way in one go with the rest of the nitpicks when those are all available together, and if the patch clears overall. Thanks!
================
Comment at: llvm/lib/CodeGen/MachineVerifier.cpp:2190
+public:
+ // Set-up the FILTERb. \pre Input register set \p RS must have no duplicates.
+ // Both virtual and physical registers are fine.
----------------
rtereshin wrote:
> rudkx wrote:
> > FILTERb seems like a typo.
> Not a typo, intended is `OUT_b`, as a subscript, for "block". FILTER is unique per BB.
Does that clears the issue, or you'd rather prefer those subscripts dropped (I suppose everywhere then, not just on `FILTERb`)?
I don't have a preference, fine either way.
Repository:
rG LLVM Github Monorepo
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D75033/new/
https://reviews.llvm.org/D75033
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