[llvm] daac8db - [X86] combineX86ShuffleChain - select X86ISD::FAND/ISD::AND based on MaskVT

[Simon Pilgrim via llvm-commits]

Author: Simon Pilgrim
Date: 2020-02-24T18:24:44Z
New Revision: daac8dba77057950190f6c393b6c0aa902a5ab3b

URL: https://github.com/llvm/llvm-project/commit/daac8dba77057950190f6c393b6c0aa902a5ab3b
DIFF: https://github.com/llvm/llvm-project/commit/daac8dba77057950190f6c393b6c0aa902a5ab3b.diff

LOG: [X86] combineX86ShuffleChain - select X86ISD::FAND/ISD::AND based on MaskVT

Noticed by inspection, we shouldn't use FloatDomain directly, we've already bitcast both inputs to MaskVT so select the opcode using that.

Added: 
    

Modified: 
    llvm/lib/Target/X86/X86ISelLowering.cpp

Removed: 
    


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diff  --git a/llvm/lib/Target/X86/X86ISelLowering.cpp b/llvm/lib/Target/X86/X86ISelLowering.cpp
index 8e2d60f3bcd0..bd9e7f075918 100644
--- a/llvm/lib/Target/X86/X86ISelLowering.cpp
+++ b/llvm/lib/Target/X86/X86ISelLowering.cpp
@@ -34133,7 +34133,7 @@ static SDValue combineX86ShuffleChain(ArrayRef<SDValue> Inputs, SDValue Root,
     SDValue BitMask = getConstVector(EltBits, UndefElts, MaskVT, DAG, DL);
     Res = DAG.getBitcast(MaskVT, V1);
     unsigned AndOpcode =
-        FloatDomain ? unsigned(X86ISD::FAND) : unsigned(ISD::AND);
+        MaskVT.isFloatingPoint() ? unsigned(X86ISD::FAND) : unsigned(ISD::AND);
     Res = DAG.getNode(AndOpcode, DL, MaskVT, Res, BitMask);
     return DAG.getBitcast(RootVT, Res);
   }