[PATCH] D74734: [AArch64][SVE] Add the SVE dupq_lane intrinsic
Kerry McLaughlin via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Mon Feb 24 06:13:55 PST 2020
kmclaughlin marked 4 inline comments as done.
kmclaughlin added a comment.
Thanks for taking a look at this, @sdesmalen!
================
Comment at: llvm/lib/Target/AArch64/AArch64ISelLowering.cpp:7496
+ auto CIdx = dyn_cast<ConstantSDNode>(Idx128);
+ if (CIdx && (CIdx->getZExtValue() <= 3)) {
+ auto CI = DAG.getTargetConstant(CIdx->getZExtValue(), DL, MVT::i64);
----------------
sdesmalen wrote:
> nit: can you replace `auto` in these cases with SDValue? (which I think this is?)
Replaced other cases of auto here with SDValue or SDNode
Repository:
rG LLVM Github Monorepo
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D74734/new/
https://reviews.llvm.org/D74734
More information about the llvm-commits
mailing list