[PATCH] D74471: [AArch64][SVE] Add predicate reinterpret intrinsics
    Sander de Smalen via Phabricator via llvm-commits 
    llvm-commits at lists.llvm.org
       
    Mon Feb 24 05:38:52 PST 2020
    
    
  
sdesmalen added inline comments.
================
Comment at: llvm/lib/Target/AArch64/AArch64ISelLowering.cpp:3060
+        DAG.getNode(AArch64ISD::REINTERPRET_CAST, dl, OutVT, Op.getOperand(1));
+    SDValue Mask = getPTrue(DAG, dl, InVT, AArch64SVEPredPattern::all);
+    SDValue MaskReinterpret =
----------------
sdesmalen wrote:
> Can you just use OutVT instead of using a REINTERPET_CAST?
Sorry, ignore that comment, it of course needs the reinterpret cast because the AND operation is done on nxv16i1.
CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D74471/new/
https://reviews.llvm.org/D74471
    
    
More information about the llvm-commits
mailing list