[PATCH] D75005: [WebAssembly] Fix ISel failure with sext_inreg of i32 vector lanes
Heejin Ahn via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Sat Feb 22 00:29:51 PST 2020
aheejin accepted this revision.
aheejin added a comment.
This revision is now accepted and ready to land.
This part has kind of complicated history and I hope this can be simplified someday 😂... Btw can the test case be simplified? Do we need all that code to generate the pattern?
Repository:
rG LLVM Github Monorepo
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D75005/new/
https://reviews.llvm.org/D75005
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