[PATCH] D74943: [GISel][KnownBits]{NFC} Add a cache mechanism to speed compile time
Quentin Colombet via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Fri Feb 21 11:36:26 PST 2020
qcolombet marked an inline comment as done.
qcolombet added a comment.
> My long term plan for the intra/inter-pass cache is based about caching based on the register too.
That seems fragile to do that generally. I agree that is less likely that a register changes, but it is not programmatically impossible. E.g., we could imagine that register numbers get recycle and then we would hit a cache entry that was not intended for a register.
Bottom line, whatever caching we do, it will have to be bound to some kind of observer in my opinion.
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https://reviews.llvm.org/D74943/new/
https://reviews.llvm.org/D74943
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