[PATCH] D74581: [llvm][CodeGen][aarch64] Add continuous prefetch intrinsics for SVE.
Sander de Smalen via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Fri Feb 21 10:51:33 PST 2020
sdesmalen accepted this revision.
sdesmalen added a comment.
This revision is now accepted and ready to land.
nit: in the title:
s/continuous/contiguous/
LGTM otherwise
================
Comment at: llvm/lib/Target/AArch64/AArch64ISelDAGToDAG.cpp:4414
+namespace {
+/// When \p PredVT is a scalable vector predicate in the form
----------------
nit: Any reason you're using an anonymous namespace over `static` for these functions?
================
Comment at: llvm/lib/Target/AArch64/AArch64ISelDAGToDAG.cpp:4424
+
+ if (PredVT.getVectorElementType() != MVT::i1)
+ return EVT();
----------------
nit: you can fold this into the condition above.
================
Comment at: llvm/lib/Target/AArch64/AArch64ISelDAGToDAG.cpp:4432
+
+ EVT ScalarVT = EVT::getIntegerVT(Ctx, 128 / NumElts);
+ EVT MemVT = EVT::getVectorVT(Ctx, ScalarVT, NumElts, /*IsScalable=*/true);
----------------
instead of `128`, can you use `AArch64::SVEBitsPerBlock`?
Repository:
rG LLVM Github Monorepo
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https://reviews.llvm.org/D74581/new/
https://reviews.llvm.org/D74581
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