[PATCH] D74874: [mlir][spirv] Add lowering for load/store zero-rank memref from std to SPIR-V.

[Mahesh Ravishankar via Phabricator via llvm-commits]

mravishankar accepted this revision.
mravishankar added a comment.
This revision is now accepted and ready to land.

This looks fine to me. Thanks for adding this.
But please add serialization tests as well


Repository:
  rG LLVM Github Monorepo

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https://reviews.llvm.org/D74874