[PATCH] D74856: [AArch64][SVE] Add backend support for splats of immediates
Eli Friedman via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Wed Feb 19 14:18:29 PST 2020
efriedma added inline comments.
================
Comment at: llvm/lib/Target/AArch64/AArch64SVEInstrInfo.td:13
+def SVE8BitLslImm : ComplexPattern<i32, 2, "SelectSVE8BitLslImm", [imm]>;
+
----------------
Is there some reason you can't use the existing cpy_imm8_opt_lsl_i8?
================
Comment at: llvm/lib/Target/AArch64/AArch64SVEInstrInfo.td:342
+ def : Pat<(nxv2f64 (AArch64dup fpimm64:$imm8)),
+ (FDUP_ZI_D fpimm64:$imm8)>;
+ }
----------------
This is a little inconsistent with the other patterns: I think we also need need nxv2f32/nxv4f16/nxv2f16?
================
Comment at: llvm/test/CodeGen/AArch64/sve-vector-splat.ll:306
+; CHECK-LABEL: splat_nxv4f32_imm:
+; CHECK: mov z0.s, #1
+; CHECK-NEXT: ret
----------------
It looks like splat_nxv4f32_imm is returning the integer 1, not the floating-point 1.0?
Repository:
rG LLVM Github Monorepo
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D74856/new/
https://reviews.llvm.org/D74856
More information about the llvm-commits
mailing list