[PATCH] D74744: [TBLGEN] Inhibit generation of unneeded psets

[Stanislav Mekhanoshin via Phabricator via llvm-commits]

rampitec added a comment.

In D74744#1881177 <https://reviews.llvm.org/D74744#1881177>, @craig.topper wrote:

> @rampitec Since you've been looking at register pressure sets. Do you have any suggestions on how to prevent VK16 and VK16WM from being merged on X86? Most our instructions that use these classes use the VK16WM class which contains one less register than VK16. All of the registers in both classes are allocatable. So tracking VK16WM pressure correctly is important to make sure we don't over count by 1 in situations where everything is constrained to VK16WM.


>From what you are describing this is dynamic, i.e. depends on some enabled features and constrained RC. Maybe you can do something like in the SIRegisterInfo::getRegUnitPressureSets(): https://llvm.org/doxygen/SIRegisterInfo_8cpp_source.html#l01762
I had to exclude register M0 from pressure with this:

  static const int Empty[] = { -1 };
  
  if (hasRegUnit(AMDGPU::M0, RegUnit))
    return Empty;

Perhaps you can exclude that extra register conditionally.

We also have to override TRI::getRegPressureLimit() to return different limits depending on some compile time conditions.


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