[PATCH] D74624: [MIPS GlobalISel] Select 4 byte unaligned load and store

[Petar Avramovic via Phabricator via llvm-commits]

This revision was automatically updated to reflect the committed changes.
Closed by commit rG5171d1523dd8: [MIPS GlobalISel] Select 4 byte unaligned load and store (authored by Petar.Avramovic).

Changed prior to commit:
  https://reviews.llvm.org/D74624?vs=244685&id=245363#toc

Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D74624/new/

https://reviews.llvm.org/D74624

Files:
  llvm/lib/Target/Mips/MipsInstructionSelector.cpp
  llvm/lib/Target/Mips/MipsLegalizerInfo.cpp
  llvm/lib/Target/Mips/MipsRegisterBankInfo.cpp
  llvm/test/CodeGen/Mips/GlobalISel/instruction-select/load_4_unaligned.mir
  llvm/test/CodeGen/Mips/GlobalISel/instruction-select/load_4_unaligned_r6.mir
  llvm/test/CodeGen/Mips/GlobalISel/instruction-select/store_4_unaligned.mir
  llvm/test/CodeGen/Mips/GlobalISel/instruction-select/store_4_unaligned_r6.mir
  llvm/test/CodeGen/Mips/GlobalISel/legalizer/load_4_unaligned.mir
  llvm/test/CodeGen/Mips/GlobalISel/legalizer/store_4_unaligned.mir
  llvm/test/CodeGen/Mips/GlobalISel/llvm-ir/load_4_unaligned.ll
  llvm/test/CodeGen/Mips/GlobalISel/llvm-ir/phi.ll
  llvm/test/CodeGen/Mips/GlobalISel/llvm-ir/store_4_unaligned.ll
  llvm/test/CodeGen/Mips/GlobalISel/regbankselect/load_4_unaligned.mir
  llvm/test/CodeGen/Mips/GlobalISel/regbankselect/phi.mir
  llvm/test/CodeGen/Mips/GlobalISel/regbankselect/store_4_unaligned.mir

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