[PATCH] D74785: [AArch64][SVE] Add intrinsics for SVE2 bitwise ternary operations

[Danilo Carvalho Grael via Phabricator via llvm-commits]

dancgr added inline comments.


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Comment at: llvm/test/CodeGen/AArch64/sve2-bitwise-ternary.ll:153
+declare <vscale x 2 x i64> @llvm.aarch64.sve.nbsl.nxv2i64(<vscale x 2 x i64>,<vscale x 2 x i64>,<vscale x 2 x i64>)
\ No newline at end of file

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efriedma wrote:
> Missing newline
> 
> Any particular reason you're only testing bsl with nxv2i64 operands?
I didn't add other operand types for bsl because the class definition on SVEInstrFormats.td for bsl, bsl1n, bsl2n and nbsl were only defined for ZPR64. For eor3 and bcax there was instruction aliases for ZPR32, ZPR16 and ZPR8.


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  https://reviews.llvm.org/D74785/new/

https://reviews.llvm.org/D74785