[llvm] 4ca753f - [RISCV] Implement mayBeEmittedAsTailCall for tail call optimization

[Andrew Wei via llvm-commits]

Author: Andrew Wei
Date: 2020-02-18T23:56:42+08:00
New Revision: 4ca753f4e3ed194ada95f3911a58d70915ce2acd

URL: https://github.com/llvm/llvm-project/commit/4ca753f4e3ed194ada95f3911a58d70915ce2acd
DIFF: https://github.com/llvm/llvm-project/commit/4ca753f4e3ed194ada95f3911a58d70915ce2acd.diff

LOG: [RISCV] Implement mayBeEmittedAsTailCall for tail call optimization

Implement TargetLowering callback mayBeEmittedAsTailCall for riscv in CodeGenPrepare,
which will duplicate return instructions to enable tailcall optimization.

Differential Revision: https://reviews.llvm.org/D73699

Added: 
    

Modified: 
    llvm/lib/Target/RISCV/RISCVISelLowering.cpp
    llvm/lib/Target/RISCV/RISCVISelLowering.h
    llvm/test/CodeGen/RISCV/tail-calls.ll

Removed: 
    


################################################################################
diff  --git a/llvm/lib/Target/RISCV/RISCVISelLowering.cpp b/llvm/lib/Target/RISCV/RISCVISelLowering.cpp
index 4500b3473af3..be6d3f522242 100644
--- a/llvm/lib/Target/RISCV/RISCVISelLowering.cpp
+++ b/llvm/lib/Target/RISCV/RISCVISelLowering.cpp
@@ -2494,6 +2494,10 @@ void RISCVTargetLowering::validateCCReservedRegs(
         F, "Argument register required, but has been reserved."});
 }
 
+bool RISCVTargetLowering::mayBeEmittedAsTailCall(const CallInst *CI) const {
+  return CI->isTailCall();
+}
+
 const char *RISCVTargetLowering::getTargetNodeName(unsigned Opcode) const {
   switch ((RISCVISD::NodeType)Opcode) {
   case RISCVISD::FIRST_NUMBER:

diff  --git a/llvm/lib/Target/RISCV/RISCVISelLowering.h b/llvm/lib/Target/RISCV/RISCVISelLowering.h
index b2ad75d67024..58bb0f3264b9 100644
--- a/llvm/lib/Target/RISCV/RISCVISelLowering.h
+++ b/llvm/lib/Target/RISCV/RISCVISelLowering.h
@@ -181,6 +181,7 @@ class RISCVTargetLowering : public TargetLowering {
                                          Type *Ty) const override {
     return true;
   }
+  bool mayBeEmittedAsTailCall(const CallInst *CI) const override;
 
   template <class NodeTy>
   SDValue getAddr(NodeTy *N, SelectionDAG &DAG, bool IsLocal = true) const;

diff  --git a/llvm/test/CodeGen/RISCV/tail-calls.ll b/llvm/test/CodeGen/RISCV/tail-calls.ll
index 14af16ed3c89..c989df932a4b 100644
--- a/llvm/test/CodeGen/RISCV/tail-calls.ll
+++ b/llvm/test/CodeGen/RISCV/tail-calls.ll
@@ -168,6 +168,50 @@ entry:
   ret i32 %rv
 }
 
+; Duplicate returns to enable tail call optimizations.
+declare i32 @test()
+declare i32 @test1()
+declare i32 @test2()
+declare i32 @test3()
+define i32 @duplicate_returns(i32 %a, i32 %b) nounwind {
+; CHECK-LABEL: duplicate_returns:
+; CHECK:    tail test2
+; CHECK:    tail test
+; CHECK:    tail test1
+; CHECK:    tail test3
+entry:
+  %cmp = icmp eq i32 %a, 0
+  br i1 %cmp, label %if.then, label %if.else
+
+if.then:                                          ; preds = %entry
+  %call = tail call i32 @test()
+  br label %return
+
+if.else:                                          ; preds = %entry
+  %cmp1 = icmp eq i32 %b, 0
+  br i1 %cmp1, label %if.then2, label %if.else4
+
+if.then2:                                         ; preds = %if.else
+  %call3 = tail call i32 @test1()
+  br label %return
+
+if.else4:                                         ; preds = %if.else
+  %cmp5 = icmp sgt i32 %a, %b
+  br i1 %cmp5, label %if.then6, label %if.else8
+
+if.then6:                                         ; preds = %if.else4
+  %call7 = tail call i32 @test2()
+  br label %return
+
+if.else8:                                         ; preds = %if.else4
+  %call9 = tail call i32 @test3()
+  br label %return
+
+return:                                           ; preds = %if.else8, %if.then6, %if.then2, %if.then
+  %retval = phi i32 [ %call, %if.then ], [ %call3, %if.then2 ], [ %call7, %if.then6 ], [ %call9, %if.else8 ]
+  ret i32 %retval
+}
+
 !llvm.module.flags = !{!0}
 !0 = !{i32 1, !"ProfileSummary", !1}
 !1 = !{!2, !3, !4, !5, !6, !7, !8, !9}