[PATCH] D71492: [SCEV] Generate AddRec for trivial and LCSSA phis outside of loop header (WIP)

[Michael Kruse via Phabricator via llvm-commits]

Meinersbur added a comment.

What is the status of this? Does it depend on D71538 <https://reviews.llvm.org/D71538>?

If D71538 <https://reviews.llvm.org/D71538> goes in, are this patch and D71539 <https://reviews.llvm.org/D71539> equivalent?


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D71492/new/

https://reviews.llvm.org/D71492