[llvm] 4abbace - [X86] Add test showing failure to combine shuffle to bit rotation
Simon Pilgrim via llvm-commits
llvm-commits at lists.llvm.org
Sat Feb 15 11:49:45 PST 2020
Author: Simon Pilgrim
Date: 2020-02-15T19:23:00Z
New Revision: 4abbaceea07f74c7ed0b2a5b7b452d688e80d24a
URL: https://github.com/llvm/llvm-project/commit/4abbaceea07f74c7ed0b2a5b7b452d688e80d24a
DIFF: https://github.com/llvm/llvm-project/commit/4abbaceea07f74c7ed0b2a5b7b452d688e80d24a.diff
LOG: [X86] Add test showing failure to combine shuffle to bit rotation
Added:
Modified:
llvm/test/CodeGen/X86/vector-shuffle-combining-xop.ll
Removed:
################################################################################
diff --git a/llvm/test/CodeGen/X86/vector-shuffle-combining-xop.ll b/llvm/test/CodeGen/X86/vector-shuffle-combining-xop.ll
index 6460c5233bcc..5264ab101c4a 100644
--- a/llvm/test/CodeGen/X86/vector-shuffle-combining-xop.ll
+++ b/llvm/test/CodeGen/X86/vector-shuffle-combining-xop.ll
@@ -252,6 +252,15 @@ define <4 x i32> @combine_vpperm_10zz32BA(<4 x i32> %a0, <4 x i32> %a1) {
ret <4 x i32> %res3
}
+define <16 x i8> @combine_vpperm_as_proti_v8i16(<16 x i8> %a0, <16 x i8> %a1) {
+; CHECK-LABEL: combine_vpperm_as_proti_v8i16:
+; CHECK: # %bb.0:
+; CHECK-NEXT: vpperm {{.*#+}} xmm0 = xmm0[1,0,3,2,5,4,7,6,9,8,11,10,13,12,15,14]
+; CHECK-NEXT: ret{{[l|q]}}
+ %res0 = call <16 x i8> @llvm.x86.xop.vpperm(<16 x i8> %a0, <16 x i8> %a1, <16 x i8> <i8 1, i8 0, i8 3, i8 2, i8 5, i8 4, i8 7, i8 6, i8 9, i8 8, i8 11, i8 10, i8 13, i8 12, i8 15, i8 14>)
+ ret <16 x i8> %res0
+}
+
define <16 x i8> @combine_shuffle_proti_v2i64(<2 x i64> %a0) {
; CHECK-LABEL: combine_shuffle_proti_v2i64:
; CHECK: # %bb.0:
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