[llvm] dc0b815 - [AArch64][FIX] Correct register live range during pseudo expansion.

[Pavel Iliin via llvm-commits]

Author: Pavel Iliin
Date: 2020-02-15T12:16:56Z
New Revision: dc0b8159890134a59fdf34b20e8b2052d9456441

URL: https://github.com/llvm/llvm-project/commit/dc0b8159890134a59fdf34b20e8b2052d9456441
DIFF: https://github.com/llvm/llvm-project/commit/dc0b8159890134a59fdf34b20e8b2052d9456441.diff

LOG: [AArch64][FIX] Correct register live range during pseudo expansion.

This commit fixes the broken tests after
commit b6a9fe209992789be3ed95664d25196361cfad34
on the expensive check builder:
http://lab.llvm.org:8011/builders/llvm-clang-x86_64-expensive-checks-ubuntu/builds/2884

Added: 
    

Modified: 
    llvm/lib/Target/AArch64/AArch64ExpandPseudoInsts.cpp

Removed: 
    


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diff  --git a/llvm/lib/Target/AArch64/AArch64ExpandPseudoInsts.cpp b/llvm/lib/Target/AArch64/AArch64ExpandPseudoInsts.cpp
index 491f0497f154..496056ff24cd 100644
--- a/llvm/lib/Target/AArch64/AArch64ExpandPseudoInsts.cpp
+++ b/llvm/lib/Target/AArch64/AArch64ExpandPseudoInsts.cpp
@@ -464,14 +464,18 @@ bool AArch64ExpandPseudo::expandMI(MachineBasicBlock &MBB,
         BuildMI(MBB, MBBI, MI.getDebugLoc(),
                 TII->get(Opcode == AArch64::BSPv8i8 ? AArch64::ORRv8i8
                                                     : AArch64::ORRv16i8))
-            .addReg(DstReg, RegState::Define)
+            .addReg(DstReg,
+                    RegState::Define |
+                        getRenamableRegState(MI.getOperand(0).isRenamable()))
             .add(MI.getOperand(1))
             .add(MI.getOperand(1));
         BuildMI(MBB, MBBI, MI.getDebugLoc(),
                 TII->get(Opcode == AArch64::BSPv8i8 ? AArch64::BSLv8i8
                                                     : AArch64::BSLv16i8))
             .add(MI.getOperand(0))
-            .addReg(DstReg, RegState::Kill)
+            .addReg(DstReg,
+                    RegState::Kill |
+                        getRenamableRegState(MI.getOperand(0).isRenamable()))
             .add(MI.getOperand(2))
             .add(MI.getOperand(3));
       }