[llvm] 391cc4d - [X86] Use ZERO_EXTEND instead of SIGN_EXTEND in the fast isel handling of convert_from_fp16.
Craig Topper via llvm-commits
llvm-commits at lists.llvm.org
Fri Feb 14 10:57:30 PST 2020
Author: Craig Topper
Date: 2020-02-14T10:57:12-08:00
New Revision: 391cc4dd41db934081c37ee523cb2149bf0e3a41
URL: https://github.com/llvm/llvm-project/commit/391cc4dd41db934081c37ee523cb2149bf0e3a41
DIFF: https://github.com/llvm/llvm-project/commit/391cc4dd41db934081c37ee523cb2149bf0e3a41.diff
LOG: [X86] Use ZERO_EXTEND instead of SIGN_EXTEND in the fast isel handling of convert_from_fp16.
Added:
Modified:
llvm/lib/Target/X86/X86FastISel.cpp
llvm/test/CodeGen/X86/fast-isel-float-half-convertion.ll
Removed:
################################################################################
diff --git a/llvm/lib/Target/X86/X86FastISel.cpp b/llvm/lib/Target/X86/X86FastISel.cpp
index ccfa01677894..027e2c2d45af 100644
--- a/llvm/lib/Target/X86/X86FastISel.cpp
+++ b/llvm/lib/Target/X86/X86FastISel.cpp
@@ -2648,8 +2648,8 @@ bool X86FastISel::fastLowerIntrinsicCall(const IntrinsicInst *II) {
ResultReg = fastEmitInst_extractsubreg(MVT::i16, ResultReg, true, RegIdx);
} else {
assert(Op->getType()->isIntegerTy(16) && "Expected a 16-bit integer!");
- // Explicitly sign-extend the input to 32-bit.
- InputReg = fastEmit_r(MVT::i16, MVT::i32, ISD::SIGN_EXTEND, InputReg,
+ // Explicitly zero-extend the input to 32-bit.
+ InputReg = fastEmit_r(MVT::i16, MVT::i32, ISD::ZERO_EXTEND, InputReg,
/*Kill=*/false);
// The following SCALAR_TO_VECTOR will be expanded into a VMOVDI2PDIrr.
diff --git a/llvm/test/CodeGen/X86/fast-isel-float-half-convertion.ll b/llvm/test/CodeGen/X86/fast-isel-float-half-convertion.ll
index db892fc8ee98..43a26c123e78 100644
--- a/llvm/test/CodeGen/X86/fast-isel-float-half-convertion.ll
+++ b/llvm/test/CodeGen/X86/fast-isel-float-half-convertion.ll
@@ -15,7 +15,7 @@ entry:
define float @test_fp16_to_fp32(i32 %a) {
; CHECK-LABEL: test_fp16_to_fp32:
-; CHECK: movswl %di, %eax
+; CHECK: movzwl %di, %eax
; CHECK-NEXT: vmovd %eax, %xmm0
; CHECK-NEXT: vcvtph2ps %xmm0, %xmm0
; CHECK-NEXT: retq
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