[PATCH] D74625: [MIPS GlobalISel] Legalize non-power-of-2 and unaligned load and store

[Petar Avramovic via Phabricator via llvm-commits]

Petar.Avramovic created this revision.
Petar.Avramovic added reviewers: atanasyan, petarj.
Herald added subscribers: llvm-commits, jrtc27, hiraditya, arichardson, rovka, sdardis.
Herald added a project: LLVM.
Petar.Avramovic added a parent revision: D74624: [MIPS GlobalISel] Select 4 byte unaligned load and store.

Custom legalize non-power-of-2 and unaligned load and store for MIPS32r5
and older, custom legalize non-power-of-2 load and store for MIPS32r6.

Don't attempt to combine non power of 2 loads or unaligned loads when
subtarget doesn't support them(MIPS32r5 and older).


Repository:
  rG LLVM Github Monorepo

https://reviews.llvm.org/D74625

Files:
  llvm/lib/Target/Mips/MipsLegalizerInfo.cpp
  llvm/lib/Target/Mips/MipsPreLegalizerCombiner.cpp
  llvm/test/CodeGen/Mips/GlobalISel/legalizer/load_split_because_of_memsize_or_align copy 2.mir
  llvm/test/CodeGen/Mips/GlobalISel/legalizer/store_split_because_of_memsize_or_align.mir
  llvm/test/CodeGen/Mips/GlobalISel/llvm-ir/load_split_because_of_memsize_or_align.ll
  llvm/test/CodeGen/Mips/GlobalISel/llvm-ir/store_split_because_of_memsize_or_align.ll

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