[PATCH] D74601: SystemZ target - Incorrect code generated for accessing thread_local variables when high-word feature is enabled

Slavomír Kučera via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Fri Feb 14 03:16:04 PST 2020


slavek-kucera created this revision.
slavek-kucera added a reviewer: uweigand.
Herald added subscribers: llvm-commits, hiraditya.
Herald added a project: LLVM.

I came across a bug in the generated code for SystemZ target when accessing thread_local variables in functions that have 7 or more parameters.

The problem can be seen here
https://godbolt.org/z/v77J_p

while extracting the values from AR0 and AR1

  ear     %r0, %a0                 ; copy AR0 to GR0L
  risblg  %r14, %r0, 0, 159, 32    <<<<<<<< copy GR0H to GR14L
  sllg    %r14, %r14, 32
  ear     %r0, %a1              
  risblg  %r14, %r0, 0, 159, 32    <<<<<<<< the same issue here

the compiler thinks there is an option to copy the content of access registers into high half of the general purpose register, which is not available on the platform.

Bug report: https://bugs.llvm.org/show_bug.cgi?id=44254


Repository:
  rG LLVM Github Monorepo

https://reviews.llvm.org/D74601

Files:
  llvm/lib/Target/SystemZ/SystemZISelLowering.cpp


Index: llvm/lib/Target/SystemZ/SystemZISelLowering.cpp
===================================================================
--- llvm/lib/Target/SystemZ/SystemZISelLowering.cpp
+++ llvm/lib/Target/SystemZ/SystemZISelLowering.cpp
@@ -3094,12 +3094,14 @@
   EVT PtrVT = getPointerTy(DAG.getDataLayout());
 
   // The high part of the thread pointer is in access register 0.
-  SDValue TPHi = DAG.getCopyFromReg(Chain, DL, SystemZ::A0, MVT::i32);
-  TPHi = DAG.getNode(ISD::ANY_EXTEND, DL, PtrVT, TPHi);
+  SDNode *AR0 = DAG.getMachineNode(SystemZ::EAR, DL, MVT::i32,
+                                   DAG.getRegister(SystemZ::A0, MVT::i32));
+  SDValue TPHi = DAG.getNode(ISD::ANY_EXTEND, DL, PtrVT, SDValue(AR0, 0));
 
   // The low part of the thread pointer is in access register 1.
-  SDValue TPLo = DAG.getCopyFromReg(Chain, DL, SystemZ::A1, MVT::i32);
-  TPLo = DAG.getNode(ISD::ZERO_EXTEND, DL, PtrVT, TPLo);
+  SDNode *AR1 = DAG.getMachineNode(SystemZ::EAR, DL, MVT::i32,
+                                   DAG.getRegister(SystemZ::A1, MVT::i32));
+  SDValue TPLo = DAG.getNode(ISD::ZERO_EXTEND, DL, PtrVT, SDValue(AR1, 0));
 
   // Merge them into a single 64-bit address.
   SDValue TPHiShifted = DAG.getNode(ISD::SHL, DL, PtrVT, TPHi,


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