[PATCH] D58521: [DAGCombiner] allow truncation of binops after legalization if desirable

[Matt Arsenault via Phabricator via llvm-commits]

arsenm added inline comments.
Herald added a subscriber: kerbowa.


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Comment at: llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp:10842
   case ISD::XOR:
-    if (!LegalOperations && N0.hasOneUse() &&
+    if ((!LegalOperations || TLI.isTypeDesirableForOp(N0.getOpcode(), VT)) &&
         (isConstantOrConstantVector(N0.getOperand(0), true) ||
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Due to the lack of register bank awareness, the AMDGPU answer depends on whether the source node is divergent. This needs to pass the node itself, not just the opcode and type to answer properly


CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D58521/new/

https://reviews.llvm.org/D58521