[PATCH] D52447: [Tablegen/RFC] Introduce Mask to limit generation of inferred register classes

[Matt Arsenault via Phabricator via llvm-commits]

arsenm added inline comments.
Herald added a project: LLVM.


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Comment at: include/llvm/Target/Target.td:286
+  //   def SRegshigh : MyClass<16, [i16], (shl SRegs, 5)>
+  // The main register file SReg is paritioned through additional constraints
+  // classes available with theSRegslow/high classes.
----------------
Typo paritioned


Repository:
  rL LLVM

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  https://reviews.llvm.org/D52447/new/

https://reviews.llvm.org/D52447