[PATCH] D71217: Fix incorrect logic in maintaining the side-effect of compiler generated outliner functions

[Jin Lin via Phabricator via llvm-commits]

jinlin added a comment.

In D71217#1875153 <https://reviews.llvm.org/D71217#1875153>, @paquette wrote:

> I think a MIR testcase would be simpler here. Something like this should work, no?
>
>   # NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
>   # RUN: llc -mtriple=aarch64-apple-darwin -run-pass=machine-outliner -verify-machineinstrs  %s -o - | FileCheck %s
>   --- |
>     define void @foo() noredzone {ret void}
>   ...
>   ---
>  
>   name:            foo
>   tracksRegLiveness: true
>   body:             |
>     ; CHECK-LABEL: name: foo
>     ; CHECK: bb.0:
>     ; CHECK:   successors: %bb.1(0x80000000)
>     ; CHECK:   liveins: $w4
>     ; CHECK:   BL @OUTLINED_FUNCTION_0, implicit-def $lr, implicit $sp, implicit-def $w3, implicit-def $w2, implicit-def $w1, implicit-def $w0, implicit-def $lr, implicit-def $w3, implicit-def $w2, implicit-def $w1, implicit-def $w0, implicit $sp, implicit $wzr, implicit $w4
>     ; CHECK: bb.1:
>     ; CHECK:   successors: %bb.2(0x80000000)
>     ; CHECK:   liveins: $w4
>     ; CHECK:   BL @OUTLINED_FUNCTION_0, implicit-def $lr, implicit $sp, implicit-def $w3, implicit-def $w2, implicit-def $w1, implicit-def $w0, implicit-def $lr, implicit-def $w3, implicit-def $w2, implicit-def $w1, implicit-def $w0, implicit $sp, implicit $wzr, implicit $w4
>     ; CHECK: bb.2:
>     ; CHECK:   successors: %bb.3(0x80000000)
>     ; CHECK:   liveins: $w4
>     ; CHECK:   BL @OUTLINED_FUNCTION_0, implicit-def $lr, implicit $sp, implicit-def $w3, implicit-def $w2, implicit-def $w1, implicit-def $w0, implicit-def $lr, implicit-def $w3, implicit-def $w2, implicit-def $w1, implicit-def $w0, implicit $sp, implicit $wzr, implicit $w4
>     ; CHECK: bb.3:
>     ; CHECK:   liveins: $w4
>     ; CHECK:   RET_ReallyLR
>     bb.0:
>     liveins: $w4
>       $w0 = ORRWri $wzr, 1
>       $w1 = ORRWri $wzr, 2
>       $w2 = ORRWri $wzr, 3
>       $w3 = ORRWri $w4, 4
>     bb.1:
>     liveins: $w4
>       $w0 = ORRWri $wzr, 1
>       $w1 = ORRWri $wzr, 2
>       $w2 = ORRWri $wzr, 3
>       $w3 = ORRWri $w4, 4
>     bb.2:
>       liveins: $w4
>       $w0 = ORRWri $wzr, 1
>       $w1 = ORRWri $wzr, 2
>       $w2 = ORRWri $wzr, 3
>       $w3 = ORRWri $w4, 4
>     bb.3:
>       liveins: $w4
>       RET_ReallyLR
>


The outlined function in this test case does not serve the purpose since there are no live in registers. I did check this test case before. If I change the arguments 1, 2, 3, 4 to be incoming registers, the machine outliner won't kick in.


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  https://reviews.llvm.org/D71217/new/

https://reviews.llvm.org/D71217