[llvm] 5b08eaf - [VectorCombine] add more extract-binop tests; NFC

[Sanjay Patel via llvm-commits]

Author: Sanjay Patel
Date: 2020-02-13T10:07:20-05:00
New Revision: 5b08eaf2b717b93b2cb9cb8f6f4d6b0abd14db93

URL: https://github.com/llvm/llvm-project/commit/5b08eaf2b717b93b2cb9cb8f6f4d6b0abd14db93
DIFF: https://github.com/llvm/llvm-project/commit/5b08eaf2b717b93b2cb9cb8f6f4d6b0abd14db93.diff

LOG: [VectorCombine] add more extract-binop tests; NFC

See D74495.

Added: 
    

Modified: 
    llvm/test/Transforms/VectorCombine/X86/extract-binop.ll

Removed: 
    


################################################################################
diff  --git a/llvm/test/Transforms/VectorCombine/X86/extract-binop.ll b/llvm/test/Transforms/VectorCombine/X86/extract-binop.ll
index 175bf4228dfc..e637c439638c 100644
--- a/llvm/test/Transforms/VectorCombine/X86/extract-binop.ll
+++ b/llvm/test/Transforms/VectorCombine/X86/extract-binop.ll
@@ -92,6 +92,118 @@ define double @ext1_ext1_fsub(<2 x double> %x, <2 x double> %y) {
   ret double %r
 }
 
+define double @ext1_ext1_fadd_
diff erent_types(<2 x double> %x, <4 x double> %y) {
+; CHECK-LABEL: @ext1_ext1_fadd_
diff erent_types(
+; CHECK-NEXT:    [[E0:%.*]] = extractelement <2 x double> [[X:%.*]], i32 1
+; CHECK-NEXT:    [[E1:%.*]] = extractelement <4 x double> [[Y:%.*]], i32 1
+; CHECK-NEXT:    [[R:%.*]] = fadd fast double [[E0]], [[E1]]
+; CHECK-NEXT:    ret double [[R]]
+;
+  %e0 = extractelement <2 x double> %x, i32 1
+  %e1 = extractelement <4 x double> %y, i32 1
+  %r = fadd fast double %e0, %e1
+  ret double %r
+}
+
+define i32 @ext1_ext1_add_same_vec(<4 x i32> %x) {
+; CHECK-LABEL: @ext1_ext1_add_same_vec(
+; CHECK-NEXT:    [[E0:%.*]] = extractelement <4 x i32> [[X:%.*]], i32 1
+; CHECK-NEXT:    [[E1:%.*]] = extractelement <4 x i32> [[X]], i32 1
+; CHECK-NEXT:    [[R:%.*]] = add i32 [[E0]], [[E1]]
+; CHECK-NEXT:    ret i32 [[R]]
+;
+  %e0 = extractelement <4 x i32> %x, i32 1
+  %e1 = extractelement <4 x i32> %x, i32 1
+  %r = add i32 %e0, %e1
+  ret i32 %r
+}
+
+define i32 @ext1_ext1_add_same_vec_cse(<4 x i32> %x) {
+; CHECK-LABEL: @ext1_ext1_add_same_vec_cse(
+; CHECK-NEXT:    [[E0:%.*]] = extractelement <4 x i32> [[X:%.*]], i32 1
+; CHECK-NEXT:    [[R:%.*]] = add i32 [[E0]], [[E0]]
+; CHECK-NEXT:    ret i32 [[R]]
+;
+  %e0 = extractelement <4 x i32> %x, i32 1
+  %r = add i32 %e0, %e0
+  ret i32 %r
+}
+
+declare void @use_i64(i64)
+
+define i64 @ext1_ext1_add_same_vec_extra_use0(<2 x i64> %x) {
+; CHECK-LABEL: @ext1_ext1_add_same_vec_extra_use0(
+; CHECK-NEXT:    [[E0:%.*]] = extractelement <2 x i64> [[X:%.*]], i32 1
+; CHECK-NEXT:    call void @use_i64(i64 [[E0]])
+; CHECK-NEXT:    [[E1:%.*]] = extractelement <2 x i64> [[X]], i32 1
+; CHECK-NEXT:    [[R:%.*]] = add i64 [[E0]], [[E1]]
+; CHECK-NEXT:    ret i64 [[R]]
+;
+  %e0 = extractelement <2 x i64> %x, i32 1
+  call void @use_i64(i64 %e0)
+  %e1 = extractelement <2 x i64> %x, i32 1
+  %r = add i64 %e0, %e1
+  ret i64 %r
+}
+
+define i64 @ext1_ext1_add_same_vec_extra_use1(<2 x i64> %x) {
+; CHECK-LABEL: @ext1_ext1_add_same_vec_extra_use1(
+; CHECK-NEXT:    [[E0:%.*]] = extractelement <2 x i64> [[X:%.*]], i32 1
+; CHECK-NEXT:    [[E1:%.*]] = extractelement <2 x i64> [[X]], i32 1
+; CHECK-NEXT:    call void @use_i64(i64 [[E1]])
+; CHECK-NEXT:    [[R:%.*]] = add i64 [[E0]], [[E1]]
+; CHECK-NEXT:    ret i64 [[R]]
+;
+  %e0 = extractelement <2 x i64> %x, i32 1
+  %e1 = extractelement <2 x i64> %x, i32 1
+  call void @use_i64(i64 %e1)
+  %r = add i64 %e0, %e1
+  ret i64 %r
+}
+
+define i64 @ext1_ext1_add_same_vec_cse_extra_use(<2 x i64> %x) {
+; CHECK-LABEL: @ext1_ext1_add_same_vec_cse_extra_use(
+; CHECK-NEXT:    [[E:%.*]] = extractelement <2 x i64> [[X:%.*]], i32 1
+; CHECK-NEXT:    call void @use_i64(i64 [[E]])
+; CHECK-NEXT:    [[R:%.*]] = add i64 [[E]], [[E]]
+; CHECK-NEXT:    ret i64 [[R]]
+;
+  %e = extractelement <2 x i64> %x, i32 1
+  call void @use_i64(i64 %e)
+  %r = add i64 %e, %e
+  ret i64 %r
+}
+
+define i64 @ext1_ext1_add_uses1(<2 x i64> %x, <2 x i64> %y) {
+; CHECK-LABEL: @ext1_ext1_add_uses1(
+; CHECK-NEXT:    [[E0:%.*]] = extractelement <2 x i64> [[X:%.*]], i32 1
+; CHECK-NEXT:    call void @use_i64(i64 [[E0]])
+; CHECK-NEXT:    [[E1:%.*]] = extractelement <2 x i64> [[Y:%.*]], i32 1
+; CHECK-NEXT:    [[R:%.*]] = add i64 [[E0]], [[E1]]
+; CHECK-NEXT:    ret i64 [[R]]
+;
+  %e0 = extractelement <2 x i64> %x, i32 1
+  call void @use_i64(i64 %e0)
+  %e1 = extractelement <2 x i64> %y, i32 1
+  %r = add i64 %e0, %e1
+  ret i64 %r
+}
+
+define i64 @ext1_ext1_add_uses2(<2 x i64> %x, <2 x i64> %y) {
+; CHECK-LABEL: @ext1_ext1_add_uses2(
+; CHECK-NEXT:    [[E0:%.*]] = extractelement <2 x i64> [[X:%.*]], i32 1
+; CHECK-NEXT:    [[E1:%.*]] = extractelement <2 x i64> [[Y:%.*]], i32 1
+; CHECK-NEXT:    call void @use_i64(i64 [[E1]])
+; CHECK-NEXT:    [[R:%.*]] = add i64 [[E0]], [[E1]]
+; CHECK-NEXT:    ret i64 [[R]]
+;
+  %e0 = extractelement <2 x i64> %x, i32 1
+  %e1 = extractelement <2 x i64> %y, i32 1
+  call void @use_i64(i64 %e1)
+  %r = add i64 %e0, %e1
+  ret i64 %r
+}
+
 define i8 @ext0_ext1_add(<16 x i8> %x, <16 x i8> %y) {
 ; CHECK-LABEL: @ext0_ext1_add(
 ; CHECK-NEXT:    [[E0:%.*]] = extractelement <16 x i8> [[X:%.*]], i32 0