[PATCH] D74484: [AggressiveInstCombine] Add support for ICmp instr that feeds a select intsr's condition operand.
Roman Lebedev via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Thu Feb 13 01:17:55 PST 2020
lebedev.ri added inline comments.
================
Comment at: llvm/lib/Transforms/AggressiveInstCombine/TruncInstCombine.cpp:173
+ // If the const value is signed and negative, count the leading ones.
+ APInt Val = C->getValue();
+ if (IsSigned && Val.isNegative())
----------------
Why copy?
================
Comment at: llvm/lib/Transforms/AggressiveInstCombine/TruncInstCombine.cpp:178
+ // Otherwise, count leading zeroes.
+ auto MinBits = Val.getBitWidth() - Val.countLeadingZeros();
+ return IsSigned ? MinBits + 1 : MinBits;
----------------
APInt::getActiveBits()
================
Comment at: llvm/lib/Transforms/AggressiveInstCombine/TruncInstCombine.cpp:180
+ return IsSigned ? MinBits + 1 : MinBits;
+}
+
----------------
Correct me if i'm wrong, but won't this just work?
```
static unsigned getConstMinBitWidth(bool IsSigned, ConstantInt *C) {
const APInt& Val = C->getValue();
unsigned NonSignBits = Val.getBitWidth() - Val.getNumSignBits();
return IsSigned ? 1 + NonSignBits : NonSignBits;
}
```
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D74484/new/
https://reviews.llvm.org/D74484
More information about the llvm-commits
mailing list