[PATCH] D74254: [llvm][aarch64] SVE addressing modes.

[Francesco Petrogalli via Phabricator via llvm-commits]

fpetrogalli marked 10 inline comments as done.
fpetrogalli added inline comments.


================
Comment at: llvm/lib/Target/AArch64/AArch64ISelDAGToDAG.cpp:4464
+
+  // We don't match addition to constants
+  if (isa<ConstantSDNode>(RHS) || isa<ConstantSDNode>(LHS))
----------------
andwar wrote:
> Hm, why? Maybe document this method like you did for `SelectAddrModeIndexedSVE`?
Good catch, it is not needed.


================
Comment at: llvm/lib/Target/AArch64/SVEInstrFormats.td:6979
+/// Addressing modes
+def am_sve_indexed_s4 :ComplexPattern<i64, 2, "SelectAddrModeIndexedSVE<-8,7>", [], [SDNPWantRoot]>;
+
----------------
andwar wrote:
> Inconsistent naming with the records that follow this one.
Used the file convention (lower case, separated with `_`, starts with `am`).


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D74254/new/

https://reviews.llvm.org/D74254