[PATCH] D74471: [AArch64][SVE] Add predicate reinterpret intrinsics

Eli Friedman via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Wed Feb 12 13:01:57 PST 2020

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efriedma added a comment.

When you convert from `<vscale x 2 x i1>` to `<vscale x 16 x i1>` using sve.convert.to.svbool, what values do the other bits contain?  Zero?  Poison?  Something else?


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D74471/new/

https://reviews.llvm.org/D74471

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