[PATCH] D74336: [ARM,MVE] Add the vmovlbq,vmovltq intrinsic family.

[Dave Green via Phabricator via llvm-commits]

dmgreen accepted this revision.
dmgreen added a comment.
This revision is now accepted and ready to land.

I think these odd shuffle then extend patterns might come up in codegen too, so this looks like a nice change.

LGTM, if the test is just a test case problem.



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Comment at: llvm/lib/Target/ARM/ARMInstrMVE.td:2397
 
+  let Predicates = [IsLE,HasMVEInt] in {
+    def : Pat<(sext_inreg (v8i16 (bitconvert (ARMvrev16 (v16i8 MQPR:$src)))),
----------------
Perhaps move this down to outside of the `let Predicates = [HasMVEInt]` in block?

I also like it when Pats make it obvious what the input and the output are:
    def : Pat<(ARMvbicImm (v8i16 (bitconvert (ARMvrev16 (v16i8 MQPR:$src)))),
                          (i32 0xAFF)),
              (MVE_VMOVLu8th MQPR:$src)>;

Those are just minor Nitpicks though.


================
Comment at: llvm/test/CodeGen/Thumb2/mve-shuffleext.ll:40
 ; CHECK:       @ %bb.0: @ %entry
-; CHECK-NEXT:    vrev32.16 q0, q0
-; CHECK-NEXT:    vmovlb.u16 q0, q0
+; CHECK-NEXT:    vmovlt.s16 q0, q0
 ; CHECK-NEXT:    bx lr
----------------
vmovlt.u16? Does this need updating like the others?


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D74336/new/

https://reviews.llvm.org/D74336