[PATCH] D74254: [llvm][aarch64] SVE addressing modes.

[Francesco Petrogalli via Phabricator via llvm-commits]

fpetrogalli updated this revision to Diff 244061.
fpetrogalli added a comment.

The patch now covers all the LLVM intrinsic listed in the summary:

1. Masked load and stores:
  - Sign and zero extended load and truncated stores.
  - No extension or truncation.
2. Non-temporal load and store.


CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D74254/new/

https://reviews.llvm.org/D74254

Files:
  llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
  llvm/lib/Target/AArch64/AArch64ISelDAGToDAG.cpp
  llvm/lib/Target/AArch64/AArch64SVEInstrInfo.td
  llvm/lib/Target/AArch64/SVEInstrFormats.td
  llvm/test/CodeGen/AArch64/sve-gep.ll
  llvm/test/CodeGen/AArch64/sve-pred-contiguous-ldst-addressing-mode-reg+imm.ll
  llvm/test/CodeGen/AArch64/sve-pred-contiguous-ldst-addressing-mode-reg+reg.ll
  llvm/test/CodeGen/AArch64/sve-pred-non-temporal-ldst-addressing-mode-reg+imm.ll
  llvm/test/CodeGen/AArch64/sve-pred-non-temporal-ldst-addressing-mode-reg+reg.ll

-------------- next part --------------
A non-text attachment was scrubbed...
Name: D74254.244061.patch
Type: text/x-patch
Size: 76583 bytes
Desc: not available
URL: <http://lists.llvm.org/pipermail/llvm-commits/attachments/20200212/22d5ab1b/attachment.bin>