[llvm] d538dc0 - [AMDGPU] Fixed subreg use in sdwa-scalar-ops.mir. NFC

[Stanislav Mekhanoshin via llvm-commits]

Author: Stanislav Mekhanoshin
Date: 2020-02-11T14:27:17-08:00
New Revision: d538dc05f3b50653b97c13b446121ac16c364a14

URL: https://github.com/llvm/llvm-project/commit/d538dc05f3b50653b97c13b446121ac16c364a14
DIFF: https://github.com/llvm/llvm-project/commit/d538dc05f3b50653b97c13b446121ac16c364a14.diff

LOG: [AMDGPU] Fixed subreg use in sdwa-scalar-ops.mir. NFC

Added: 
    

Modified: 
    llvm/test/CodeGen/AMDGPU/sdwa-scalar-ops.mir

Removed: 
    


################################################################################
diff  --git a/llvm/test/CodeGen/AMDGPU/sdwa-scalar-ops.mir b/llvm/test/CodeGen/AMDGPU/sdwa-scalar-ops.mir
index 2e96d2129ec5..ed12cdd9d25b 100644
--- a/llvm/test/CodeGen/AMDGPU/sdwa-scalar-ops.mir
+++ b/llvm/test/CodeGen/AMDGPU/sdwa-scalar-ops.mir
@@ -219,7 +219,7 @@ body:             |
     %13 = COPY %7.sub1
     %14 = S_ADD_U32 %7.sub0, %0.sub0, implicit-def $scc
     %15 = S_ADDC_U32 %7.sub1, %0.sub1, implicit-def dead $scc, implicit $scc
-    %16 = REG_SEQUENCE %14, 1, %15, 2
+    %16 = REG_SEQUENCE %14, %subreg.sub0, %15, %subreg.sub1
     %18 = COPY %16
     %17 = FLAT_LOAD_DWORD %18, 0, 0, 0, 0, implicit $exec, implicit $flat_scr :: (load 4 from %ir.uglygep45)
     %60 = V_BFE_U32 %17, 8, 8, implicit $exec
@@ -227,23 +227,23 @@ body:             |
     %70 = V_ADD_I32_e32 %7.sub0, %61, implicit-def $vcc, implicit $exec
     %66 = COPY %13
     %65 = V_ADDC_U32_e32 0, %66, implicit-def $vcc, implicit $vcc, implicit $exec
-    %67 = REG_SEQUENCE %70, 1, killed %65, 2
+    %67 = REG_SEQUENCE %70, %subreg.sub0, killed %65, %subreg.sub1
     FLAT_STORE_DWORD %67, %30, 0, 0, 0, 0, implicit $exec, implicit $flat_scr :: (store 4 into %ir.tmp9)
     %37 = S_ADD_U32 %14, 4, implicit-def $scc
     %38 = S_ADDC_U32 %15, 0, implicit-def dead $scc, implicit $scc
     %71 = COPY killed %37
     %72 = COPY killed %38
-    %41 = REG_SEQUENCE killed %71, 1, killed %72, 2
+    %41 = REG_SEQUENCE killed %71, %subreg.sub0, killed %72, %subreg.sub1
     %40 = FLAT_LOAD_DWORD killed %41, 0, 0, 0, 0, implicit $exec, implicit $flat_scr :: (load 4 from %ir.scevgep)
     %73 = V_BFE_U32 %40, 8, 8, implicit $exec
     %74 = V_LSHLREV_B32_e32 2, killed %73, implicit $exec
     %83 = V_ADD_I32_e32 %7.sub0, %74, implicit-def $vcc, implicit $exec
     %78 = V_ADDC_U32_e32 0, %66, implicit-def $vcc, implicit $vcc, implicit $exec
-    %80 = REG_SEQUENCE %83, 1, killed %78, 2
+    %80 = REG_SEQUENCE %83, %subreg.sub0, killed %78, %subreg.sub1
     FLAT_STORE_DWORD %80, %30, 0, 0, 0, 0, implicit $exec, implicit $flat_scr :: (store 4 into %ir.tmp17)
     %55 = S_ADD_U32 %0.sub0, 8, implicit-def $scc
     %56 = S_ADDC_U32 %0.sub1, 0, implicit-def dead $scc, implicit $scc
-    %57 = REG_SEQUENCE %55, 1, killed %56, 2
+    %57 = REG_SEQUENCE %55, %subreg.sub0, killed %56, %subreg.sub1
     %1 = COPY %57
     S_CMPK_EQ_I32 %55, 4096, implicit-def $scc
     S_CBRANCH_SCC1 %bb.1.bb1, implicit $scc
@@ -382,7 +382,7 @@ body:             |
     %13 = COPY %7.sub1
     %14 = S_ADD_U32 %7.sub0, %0.sub0, implicit-def $scc
     %15 = S_ADDC_U32 %7.sub1, %0.sub1, implicit-def dead $scc, implicit $scc
-    %16 = REG_SEQUENCE %14, 1, %15, 2
+    %16 = REG_SEQUENCE %14, %subreg.sub0, %15, %subreg.sub1
     %18 = COPY %16
     %17 = FLAT_LOAD_DWORD %18, 0, 0, 0, 0, implicit $exec, implicit $flat_scr :: (load 4 from %ir.uglygep45)
     %60 = V_BFE_U32 %17, 8, 8, implicit $exec
@@ -390,23 +390,23 @@ body:             |
     %70 = V_ADD_I32_e32 %7.sub0, %61, implicit-def $vcc, implicit $exec
     %66 = COPY %13
     %65 = V_ADDC_U32_e32 0, %66, implicit-def $vcc, implicit $vcc, implicit $exec
-    %67 = REG_SEQUENCE %70, 1, killed %65, 2
+    %67 = REG_SEQUENCE %70, %subreg.sub0, killed %65, %subreg.sub1
     FLAT_STORE_DWORD %67, %30, 0, 0, 0, 0, implicit $exec, implicit $flat_scr :: (store 4 into %ir.tmp9)
     %37 = S_ADD_U32 %14, 4, implicit-def $scc
     %38 = S_ADDC_U32 %15, 0, implicit-def dead $scc, implicit $scc
     %71 = COPY killed %37
     %72 = COPY killed %38
-    %41 = REG_SEQUENCE killed %71, 1, killed %72, 2
+    %41 = REG_SEQUENCE killed %71, %subreg.sub0, killed %72, %subreg.sub1
     %40 = FLAT_LOAD_DWORD killed %41, 0, 0, 0, 0, implicit $exec, implicit $flat_scr :: (load 4 from %ir.scevgep)
     %73 = V_BFE_U32 %40, 8, 8, implicit $exec
     %74 = V_LSHLREV_B32_e32 %84, killed %73, implicit $exec
     %83 = V_ADD_I32_e32 %7.sub0, %74, implicit-def $vcc, implicit $exec
     %78 = V_ADDC_U32_e32 0, %66, implicit-def $vcc, implicit $vcc, implicit $exec
-    %80 = REG_SEQUENCE %83, 1, killed %78, 2
+    %80 = REG_SEQUENCE %83, %subreg.sub0, killed %78, %subreg.sub1
     FLAT_STORE_DWORD %80, %30, 0, 0, 0, 0, implicit $exec, implicit $flat_scr :: (store 4 into %ir.tmp17)
     %55 = S_ADD_U32 %0.sub0, 8, implicit-def $scc
     %56 = S_ADDC_U32 %0.sub1, 0, implicit-def dead $scc, implicit $scc
-    %57 = REG_SEQUENCE %55, 1, killed %56, 2
+    %57 = REG_SEQUENCE %55, %subreg.sub0, killed %56, %subreg.sub1
     %1 = COPY %57
     S_CMPK_EQ_I32 %55, 4096, implicit-def $scc
     S_CBRANCH_SCC1 %bb.1.bb1, implicit $scc