[PATCH] D74432: AMDGPU: Fix crash on v3i15 kernel arguments
Matt Arsenault via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Tue Feb 11 11:56:07 PST 2020
arsenm created this revision.
arsenm added a reviewer: rampitec.
Herald added subscribers: kerbowa, hiraditya, t-tye, tpr, dstuttard, yaxunl, nhaehnle, wdng, jvesely, kzhuravl.
Herald added a project: LLVM.
https://reviews.llvm.org/D74432
Files:
llvm/lib/Target/AMDGPU/AMDGPUISelLowering.cpp
llvm/test/CodeGen/AMDGPU/kernel-argument-dag-lowering.ll
Index: llvm/test/CodeGen/AMDGPU/kernel-argument-dag-lowering.ll
===================================================================
--- llvm/test/CodeGen/AMDGPU/kernel-argument-dag-lowering.ll
+++ llvm/test/CodeGen/AMDGPU/kernel-argument-dag-lowering.ll
@@ -130,3 +130,25 @@
store volatile [3 x i16] %arg1, [3 x i16] addrspace(1)* undef
ret void
}
+
+; GCN-LABEL: {{^}}v2i15_arg:
+; GCN: s_load_dword [[DWORD:s[0-9]+]]
+; GCN-DAG: s_bfe_u32 [[BFE:s[0-9]+]], [[DWORD]], 0x100010{{$}}
+; GCN-DAG: s_and_b32 [[AND:s[0-9]+]], [[DWORD]], 0x7fff{{$}}
+define amdgpu_kernel void @v2i15_arg(<2 x i15> addrspace(1)* nocapture %out, <2 x i15> %in) {
+entry:
+ store <2 x i15> %in, <2 x i15> addrspace(1)* %out, align 4
+ ret void
+}
+
+; GCN-LABEL: {{^}}v3i15_arg:
+; GCN: s_load_dword [[DWORD:s[0-9]+]]
+; GCN: s_lshl_b64
+; GCN: s_and_b32
+; GCN: s_and_b32
+; GCN: s_or_b32
+define amdgpu_kernel void @v3i15_arg(<3 x i15> addrspace(1)* nocapture %out, <3 x i15> %in) {
+entry:
+ store <3 x i15> %in, <3 x i15> addrspace(1)* %out, align 4
+ ret void
+}
Index: llvm/lib/Target/AMDGPU/AMDGPUISelLowering.cpp
===================================================================
--- llvm/lib/Target/AMDGPU/AMDGPUISelLowering.cpp
+++ llvm/lib/Target/AMDGPU/AMDGPUISelLowering.cpp
@@ -1020,6 +1020,8 @@
assert(MemVT.getVectorNumElements() == 3 ||
MemVT.getVectorNumElements() == 5);
MemVT = MemVT.getPow2VectorType(State.getContext());
+ } else if (!MemVT.isSimple() && !MemVT.isVector()) {
+ MemVT = MemVT.getRoundIntegerType(State.getContext());
}
unsigned PartOffset = 0;
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