[PATCH] D74373: AMDGPU/GlobalISel: Handle sbfe/ubfe intrinsic

[Jay Foad via Phabricator via llvm-commits]

foad added inline comments.


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Comment at: llvm/lib/Target/AMDGPU/AMDGPURegisterBankInfo.cpp:1484
+  auto OffsetMask = B.buildConstant(S32, maskTrailingOnes<unsigned>(16));
+  auto ClampOffset = B.buildAnd(S32, OffsetReg, OffsetMask);
+
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arsenm wrote:
> foad wrote:
> > Is the behaviour of the intrinsic well-defined when the "offset" argument is huge enough for this to make a difference?
> I'm assuming the intrinsic is supposed to match the behavior of the V_BFE_* instructions, which ignore the high bits
Fair enough. ANDing with 31 or 63 would fit better into a single-word instruction encoding, wouldn't it?


CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D74373/new/

https://reviews.llvm.org/D74373