[PATCH] D74311: [CodeGen] Fix the computation of the alignment of split stores.

[Sanjay Patel via Phabricator via llvm-commits]

spatel added inline comments.


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Comment at: llvm/test/CodeGen/PowerPC/split-store-alignment.ll:101-102
+; PPC64-NEXT:    [[TMP2:%.*]] = bitcast i64* [[P]] to i32*
+; PPC64-NEXT:    [[TMP3:%.*]] = getelementptr i32, i32* [[TMP2]], i32 1
+; PPC64-NEXT:    store i32 0, i32* [[TMP3]], align 4
+; PPC64-NEXT:    ret void
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lebedev.ri wrote:
> Okay, i guess there is no big-endian issue after all.
Wait - why is there no difference between LE and BE here?
We may need to explicitly specify the datalayout on the command-line or in the test file.


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D74311/new/

https://reviews.llvm.org/D74311