[PATCH] D74322: GlobalISel: Extend narrowing to G_ASHR

Jay Foad via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Mon Feb 10 08:01:55 PST 2020


foad added inline comments.


================
Comment at: llvm/lib/CodeGen/GlobalISel/CombinerHelper.cpp:1488
+    if (ShiftVal == HalfSize - 1) {
+      // (G_ASHR i64:x, 32) ->
+      //   G_MERGE_VALUES lo_32(x), (G_ASHR hi_32(x), 31)
----------------
"32" should be "31" here, but in any case this whole clause makes no sense to me. Why would shifting a 64-bit value right by 31 leave the low half unchanged?


================
Comment at: llvm/lib/CodeGen/GlobalISel/CombinerHelper.cpp:1493
+      // (G_ASHR i64:x, 63) ->
+      //   G_MERGE_VALUES (G_ASHR hi_32(x), 31), (G_ASHR hi_32(x), 31)
+      Builder.buildMerge(DstReg, { Hi, Hi });
----------------
Why not generalize this to:
```
(G_ASHR i64:x, 63) for C >= 32 ->
  G_MERGE_VALUES (G_ASHR hi_32(x), C-32), (G_ASHR hi_32(x), 31)
```
?


CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D74322/new/

https://reviews.llvm.org/D74322





More information about the llvm-commits mailing list