[PATCH] D74311: [CodeGen] Fix the computation of the alignment of split stores.

[Roman Lebedev via Phabricator via llvm-commits]

lebedev.ri accepted this revision.
lebedev.ri added a comment.
This revision is now accepted and ready to land.

LG to me.



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Comment at: llvm/test/CodeGen/PowerPC/split-store-alignment.ll:2-3
+; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
+; RUN: opt -S -mtriple=powerpc64le -codegenprepare -force-split-store < %s  | FileCheck --check-prefix=PPC64LE %s
+; RUN: opt -S -mtriple=powerpc64 -codegenprepare -force-split-store < %s  | FileCheck --check-prefix=PPC64 %s
+
----------------
Please unique checklines
```
; RUN: opt -S -mtriple=powerpc64le -codegenprepare -force-split-store < %s  | FileCheck --check-prefixes=ALL,PPC64LE %s
; RUN: opt -S -mtriple=powerpc64 -codegenprepare -force-split-store < %s  | FileCheck --check-prefixes=ALL,PPC64 %s

```


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Comment at: llvm/test/CodeGen/PowerPC/split-store-alignment.ll:101-102
+; PPC64-NEXT:    [[TMP2:%.*]] = bitcast i64* [[P]] to i32*
+; PPC64-NEXT:    [[TMP3:%.*]] = getelementptr i32, i32* [[TMP2]], i32 1
+; PPC64-NEXT:    store i32 0, i32* [[TMP3]], align 4
+; PPC64-NEXT:    ret void
----------------
Okay, i guess there is no big-endian issue after all.


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D74311/new/

https://reviews.llvm.org/D74311