[llvm] f24c43c - [X86] Autogenerate complete checks. NFC
Craig Topper via llvm-commits
llvm-commits at lists.llvm.org
Sun Feb 9 21:14:06 PST 2020
Author: Craig Topper
Date: 2020-02-09T20:39:52-08:00
New Revision: f24c43c0c50f2b89f6ce74bcdb0b24a8d73d4cc6
URL: https://github.com/llvm/llvm-project/commit/f24c43c0c50f2b89f6ce74bcdb0b24a8d73d4cc6
DIFF: https://github.com/llvm/llvm-project/commit/f24c43c0c50f2b89f6ce74bcdb0b24a8d73d4cc6.diff
LOG: [X86] Autogenerate complete checks. NFC
Added:
Modified:
llvm/test/CodeGen/X86/fastmath-float-half-conversion.ll
Removed:
################################################################################
diff --git a/llvm/test/CodeGen/X86/fastmath-float-half-conversion.ll b/llvm/test/CodeGen/X86/fastmath-float-half-conversion.ll
index 637fcc215958..c2ce7cb3fb3b 100644
--- a/llvm/test/CodeGen/X86/fastmath-float-half-conversion.ll
+++ b/llvm/test/CodeGen/X86/fastmath-float-half-conversion.ll
@@ -1,27 +1,50 @@
+; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
; RUN: llc -mtriple=x86_64-unknown-unknown -mattr=+f16c < %s | FileCheck %s --check-prefix=ALL --check-prefix=F16C
; RUN: llc -mtriple=x86_64-unknown-unknown -mattr=+avx < %s | FileCheck %s --check-prefix=ALL --check-prefix=AVX
define zeroext i16 @test1_fast(double %d) #0 {
-; ALL-LABEL: test1_fast:
-; F16C-NOT: callq {{_+}}truncdfhf2
-; F16C: vcvtsd2ss %xmm0, %xmm0, %xmm0
-; F16C-NEXT: vcvtps2ph $4, %xmm0, %xmm0
-; AVX: callq {{_+}}truncdfhf2
-; ALL: ret
+; F16C-LABEL: test1_fast:
+; F16C: # %bb.0: # %entry
+; F16C-NEXT: vcvtsd2ss %xmm0, %xmm0, %xmm0
+; F16C-NEXT: vcvtps2ph $4, %xmm0, %xmm0
+; F16C-NEXT: vmovd %xmm0, %eax
+; F16C-NEXT: # kill: def $ax killed $ax killed $eax
+; F16C-NEXT: retq
+;
+; AVX-LABEL: test1_fast:
+; AVX: # %bb.0: # %entry
+; AVX-NEXT: pushq %rax
+; AVX-NEXT: .cfi_def_cfa_offset 16
+; AVX-NEXT: callq __truncdfhf2
+; AVX-NEXT: popq %rcx
+; AVX-NEXT: .cfi_def_cfa_offset 8
+; AVX-NEXT: retq
entry:
%0 = tail call i16 @llvm.convert.to.fp16.f64(double %d)
ret i16 %0
}
define zeroext i16 @test2_fast(x86_fp80 %d) #0 {
-; ALL-LABEL: test2_fast:
-; F16C-NOT: callq {{_+}}truncxfhf2
-; F16C: fldt
-; F16C-NEXT: fstps
-; F16C-NEXT: vmovss
-; F16C-NEXT: vcvtps2ph $4, %xmm0, %xmm0
-; AVX: callq {{_+}}truncxfhf2
-; ALL: ret
+; F16C-LABEL: test2_fast:
+; F16C: # %bb.0: # %entry
+; F16C-NEXT: fldt {{[0-9]+}}(%rsp)
+; F16C-NEXT: fstps -{{[0-9]+}}(%rsp)
+; F16C-NEXT: vmovss {{.*#+}} xmm0 = mem[0],zero,zero,zero
+; F16C-NEXT: vcvtps2ph $4, %xmm0, %xmm0
+; F16C-NEXT: vmovd %xmm0, %eax
+; F16C-NEXT: # kill: def $ax killed $ax killed $eax
+; F16C-NEXT: retq
+;
+; AVX-LABEL: test2_fast:
+; AVX: # %bb.0: # %entry
+; AVX-NEXT: subq $24, %rsp
+; AVX-NEXT: .cfi_def_cfa_offset 32
+; AVX-NEXT: fldt {{[0-9]+}}(%rsp)
+; AVX-NEXT: fstpt (%rsp)
+; AVX-NEXT: callq __truncxfhf2
+; AVX-NEXT: addq $24, %rsp
+; AVX-NEXT: .cfi_def_cfa_offset 8
+; AVX-NEXT: retq
entry:
%0 = tail call i16 @llvm.convert.to.fp16.f80(x86_fp80 %d)
ret i16 %0
@@ -29,8 +52,13 @@ entry:
define zeroext i16 @test1(double %d) #1 {
; ALL-LABEL: test1:
-; ALL: callq {{_+}}truncdfhf2
-; ALL: ret
+; ALL: # %bb.0: # %entry
+; ALL-NEXT: pushq %rax
+; ALL-NEXT: .cfi_def_cfa_offset 16
+; ALL-NEXT: callq __truncdfhf2
+; ALL-NEXT: popq %rcx
+; ALL-NEXT: .cfi_def_cfa_offset 8
+; ALL-NEXT: retq
entry:
%0 = tail call i16 @llvm.convert.to.fp16.f64(double %d)
ret i16 %0
@@ -38,8 +66,15 @@ entry:
define zeroext i16 @test2(x86_fp80 %d) #1 {
; ALL-LABEL: test2:
-; ALL: callq {{_+}}truncxfhf2
-; ALL: ret
+; ALL: # %bb.0: # %entry
+; ALL-NEXT: subq $24, %rsp
+; ALL-NEXT: .cfi_def_cfa_offset 32
+; ALL-NEXT: fldt {{[0-9]+}}(%rsp)
+; ALL-NEXT: fstpt (%rsp)
+; ALL-NEXT: callq __truncxfhf2
+; ALL-NEXT: addq $24, %rsp
+; ALL-NEXT: .cfi_def_cfa_offset 8
+; ALL-NEXT: retq
entry:
%0 = tail call i16 @llvm.convert.to.fp16.f80(x86_fp80 %d)
ret i16 %0
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