[PATCH] D74165: [x86] [DAGCombine] Prefer shifts of constant widths.

[Craig Topper via Phabricator via llvm-commits]

craig.topper added inline comments.


================
Comment at: llvm/test/CodeGen/X86/select.ll:1123
+; MCU-NEXT:  .LBB20_1:
+; MCU-NEXT:    shll $3, %eax
 ; MCU-NEXT:    retl
----------------
jlebar wrote:
> RKSimon wrote:
> > Regression
> Wow.  What...is...this...architecture.
> 
> I guess the answer is, we don't do this optimization if the target doesn't have cmov?
> 
> I mean, I'll do it, but are we sure the complexity is worth it for this target?  I can't even find an Agner optimization table for Intel MCU (Quark?).
MCU is basically a 486 on a much more modern silicon process.


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  https://reviews.llvm.org/D74165/new/

https://reviews.llvm.org/D74165