[PATCH] D73644: [Mips] Add intrinsics for 4-byte and 8-byte MSA loads/stores.

[Mirko Brkusanin via Phabricator via llvm-commits]

mbrkusanin added a comment.

Rebase.

Not yet, a proposal was made to both GCC and LLVM and as far as I can tell no work was done on that yet. If we accept these names I'll let them know so we end up with matching names.

As for 4/8 byte loads, in case of having them implemented as **ld** plus some extra instructions, I don't really see the point about making sure those other vector elements have same value as first. So if we ignore those we remain with only **ld**. In that case we can just not implement these loads and just have the user use `__builtin_msa_ld_w` and `__builtin_msa_ld_d` instead. But if we do decide to implement them it would make more sense to have them only read 4/8 bytes instead of all 16. That way you can use both since **ld** is already available.


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