[PATCH] D74075: [mlir][VectorOps] Introduce a `vector.fma` op that works on n-D vectors and lowers to `llvm.intrin.fmuladd`

[Aart Bik via Phabricator via llvm-commits]

aartbik requested changes to this revision.
aartbik added inline comments.
This revision now requires changes to proceed.


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Comment at: mlir/include/mlir/Dialect/VectorOps/VectorOps.td:383
+    Multiply-add expressions operate on n-D vectors and compute a fused
+    pointwise multiply followed by accumulate. In the particular case of
+    lowering to LLVM, this is guaranteed to lower to the `llvm.fmuladd.*`
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much better, and the mention of llvm later is fine of course

I would still say something about that all shapes need to match exactly (rank and dimensions), it is implied by the syntax, and of course enforced by the traits, but why not be a bit more explicit in the doc :-)


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Comment at: mlir/test/Conversion/VectorToLLVM/vector-to-llvm.mlir:614
+
+// CHECK-LABEL: llvm.func @vector_fma
+func @vector_fma(%a: vector<8xf32>, %b: vector<2x4xf32>)
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note that something like

// CHECK-SAME: %[[A:arg[0-9]+]]: 

can be used if you want to match the argument inputs as well, see e.g.  insert_strided_slice3 (probably need to rename a/b into arg0/arg1 to be sure, although I think that renaming happens anyway)


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  https://reviews.llvm.org/D74075/new/

https://reviews.llvm.org/D74075