[PATCH] D74090: [AArch64][GlobalISel] Emit TBNZ with G_BRCOND where the condition is SLT

Jessica Paquette via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Wed Feb 5 13:58:11 PST 2020


paquette created this revision.
paquette added a reviewer: aemerson.
Herald added subscribers: Petar.Avramovic, hiraditya, kristof.beyls, rovka.
Herald added a project: LLVM.

When we have a G_ICMP which checks SLT, and the comparison is against 0, we can emit a TBNZ instead of a CBZ.

This lets us fold in things into the branch, which can provide some code size savings.

This is similar to the case in `AArch64TargetLowering::LowerBR_CC`.


https://reviews.llvm.org/D74090

Files:
  llvm/lib/Target/AArch64/AArch64InstructionSelector.cpp
  llvm/test/CodeGen/AArch64/GlobalISel/tbnz-slt.mir

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