[PATCH] D73880: AMDGPU/GlobalISel: Fix move s.buffer.load to VALU

Matt Arsenault via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Wed Feb 5 12:53:45 PST 2020


arsenm marked an inline comment as done.
arsenm added inline comments.


================
Comment at: llvm/lib/Target/AMDGPU/AMDGPURegisterBankInfo.cpp:1375-1377
+  // Use the alignment to ensure that the required offsets will fit into the
+  // immediate offsets.
+  const unsigned Align = NumLoads > 1 ? 16 * NumLoads : 4;
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arsenm wrote:
> nhaehnle wrote:
> > What's the justification for the alignment in the `NumLoads > 1` case?
> This ensures the last load's offset will fit in the immediate field
Really the align 4 in the 1 case isn't necessary


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  https://reviews.llvm.org/D73880/new/

https://reviews.llvm.org/D73880





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