[PATCH] D74049: [AVR] Implement disassembly support for I/O instructions

[Ayke via Phabricator via llvm-commits]

aykevl created this revision.
aykevl added a reviewer: dylanmckay.
aykevl added a project: LLVM.
Herald added subscribers: Jim, hiraditya.

The `in`, `out`, and `sbi`/`cbi` family of instructions seem to require a custom decoder. I'm not exactly sure why and would prefer to convince TableGen to provide the correct decoders for these, but I can't seem to convince it to do so. They simply disassemble without any operands.

---

Note: all other instructions also seem to require custom decoders, but I decided to break this up into multiple commits to make it easier to review.


Repository:
  rG LLVM Github Monorepo

https://reviews.llvm.org/D74049

Files:
  llvm/lib/Target/AVR/AVRInstrFormats.td
  llvm/lib/Target/AVR/Disassembler/AVRDisassembler.cpp
  llvm/test/MC/AVR/inst-cbi.s
  llvm/test/MC/AVR/inst-in.s
  llvm/test/MC/AVR/inst-out.s
  llvm/test/MC/AVR/inst-sbi.s
  llvm/test/MC/AVR/inst-sbic.s
  llvm/test/MC/AVR/inst-sbis.s

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