[PATCH] D72700: [DSE] Add first version of MemorySSA-backed DSE (Bottom up walk).
Alina Sbirlea via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Tue Feb 4 12:33:08 PST 2020
asbirlea added a comment.
Some more minor comments, but I think this is a reasonable first version to check in.
================
Comment at: llvm/lib/Transforms/Scalar/DeadStoreElimination.cpp:1383
+// upwards.
+// 2. Check that there no reads between DomAccess and the StartDef by checking
+// all uses starting at DomAccess and walking until we see StartDef.
----------------
s/there/there are
================
Comment at: llvm/lib/Transforms/Scalar/DeadStoreElimination.cpp:1523
+ bool isCompleteOverwrite(MemoryLocation DefLoc, Instruction *UseInst) const {
+ if (!UseInst->mayWriteToMemory())
+ return false;
----------------
Can you add a comment here, along the lines:
`UseInst has a MemoryDef associated in MemorySSA. It's possible for a MemoryDef to not write to memory, e.g. a volatile load is modeled as a MemoryDef.`
================
Comment at: llvm/lib/Transforms/Scalar/DeadStoreElimination.cpp:1692
+
+ DeadInst->eraseFromParent();
+ }
----------------
The MemDep variant of DSE also attempts to keep debug info. Does this also make sense here?
```
// Try to preserve debug information attached to the dead instruction.
salvageDebugInfo(*DeadInst);
```
================
Comment at: llvm/lib/Transforms/Scalar/DeadStoreElimination.cpp:1769
+ // Walk MemorySSA upward to find MemoryDefs that might be killed by SI.
+ while ((Next = State.getDomMemoryDef(StartDef, Current, SILoc,
+ DefVisibleToCaller, ScanLimit))) {
----------------
Nit: Move declaration of Next inside while condition?
Repository:
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https://reviews.llvm.org/D72700/new/
https://reviews.llvm.org/D72700
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