[llvm] 7128aac - [ARM] Make ARM::ArchExtKind use 64-bit underlying type, NFCI
Mikhail Maltsev via llvm-commits
llvm-commits at lists.llvm.org
Tue Feb 4 03:24:29 PST 2020
Author: Mikhail Maltsev
Date: 2020-02-04T11:24:18Z
New Revision: 7128aace600f29c81f735c3b1d3f5f51464c4630
URL: https://github.com/llvm/llvm-project/commit/7128aace600f29c81f735c3b1d3f5f51464c4630
DIFF: https://github.com/llvm/llvm-project/commit/7128aace600f29c81f735c3b1d3f5f51464c4630.diff
LOG: [ARM] Make ARM::ArchExtKind use 64-bit underlying type, NFCI
Summary:
This patch changes the underlying type of the ARM::ArchExtKind
enumeration to uint64_t and adjusts the related code.
The goal of the patch is to prepare the code base for a new
architecture extension.
Reviewers: simon_tatham, eli.friedman, ostannard, dmgreen
Reviewed By: dmgreen
Subscribers: merge_guards_bot, kristof.beyls, hiraditya, cfe-commits, llvm-commits, pbarrio
Tags: #clang, #llvm
Differential Revision: https://reviews.llvm.org/D73906
Added:
Modified:
clang/lib/Basic/Targets/ARM.cpp
clang/lib/Driver/ToolChains/Arch/ARM.cpp
llvm/include/llvm/Support/ARMTargetParser.h
llvm/lib/Support/ARMTargetParser.cpp
llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
llvm/unittests/Support/TargetParserTest.cpp
Removed:
################################################################################
diff --git a/clang/lib/Basic/Targets/ARM.cpp b/clang/lib/Basic/Targets/ARM.cpp
index c51a18216b83..c6f661fdec99 100644
--- a/clang/lib/Basic/Targets/ARM.cpp
+++ b/clang/lib/Basic/Targets/ARM.cpp
@@ -372,7 +372,7 @@ bool ARMTargetInfo::initFeatureMap(
llvm::ARM::getFPUFeatures(FPUKind, TargetFeatures);
// get default Extension features
- unsigned Extensions = llvm::ARM::getDefaultExtensions(CPU, Arch);
+ uint64_t Extensions = llvm::ARM::getDefaultExtensions(CPU, Arch);
llvm::ARM::getExtensionFeatures(Extensions, TargetFeatures);
for (auto Feature : TargetFeatures)
diff --git a/clang/lib/Driver/ToolChains/Arch/ARM.cpp b/clang/lib/Driver/ToolChains/Arch/ARM.cpp
index e7133607aedb..ce3990038a4b 100644
--- a/clang/lib/Driver/ToolChains/Arch/ARM.cpp
+++ b/clang/lib/Driver/ToolChains/Arch/ARM.cpp
@@ -57,7 +57,7 @@ void arm::getARMArchCPUFromArgs(const ArgList &Args, llvm::StringRef &Arch,
static void getARMHWDivFeatures(const Driver &D, const Arg *A,
const ArgList &Args, StringRef HWDiv,
std::vector<StringRef> &Features) {
- unsigned HWDivID = llvm::ARM::parseHWDiv(HWDiv);
+ uint64_t HWDivID = llvm::ARM::parseHWDiv(HWDiv);
if (!llvm::ARM::getHWDivFeatures(HWDivID, Features))
D.Diag(clang::diag::err_drv_clang_unsupported) << A->getAsString(Args);
}
@@ -91,7 +91,7 @@ static void DecodeARMFeaturesFromCPU(const Driver &D, StringRef CPU,
CPU = CPU.split("+").first;
if (CPU != "generic") {
llvm::ARM::ArchKind ArchKind = llvm::ARM::parseCPUArch(CPU);
- unsigned Extension = llvm::ARM::getDefaultExtensions(CPU, ArchKind);
+ uint64_t Extension = llvm::ARM::getDefaultExtensions(CPU, ArchKind);
llvm::ARM::getExtensionFeatures(Extension, Features);
}
}
diff --git a/llvm/include/llvm/Support/ARMTargetParser.h b/llvm/include/llvm/Support/ARMTargetParser.h
index 02d4c975129f..ac2cd259826d 100644
--- a/llvm/include/llvm/Support/ARMTargetParser.h
+++ b/llvm/include/llvm/Support/ARMTargetParser.h
@@ -24,7 +24,7 @@ namespace ARM {
// Arch extension modifiers for CPUs.
// Note that this is not the same as the AArch64 list
-enum ArchExtKind : unsigned {
+enum ArchExtKind : uint64_t {
AEK_INVALID = 0,
AEK_NONE = 1,
AEK_CRC = 1 << 1,
@@ -47,11 +47,11 @@ enum ArchExtKind : unsigned {
AEK_FP_DP = 1 << 18,
AEK_LOB = 1 << 19,
// Unsupported extensions.
- AEK_OS = 0x8000000,
- AEK_IWMMXT = 0x10000000,
- AEK_IWMMXT2 = 0x20000000,
- AEK_MAVERICK = 0x40000000,
- AEK_XSCALE = 0x80000000,
+ AEK_OS = 1ULL << 59,
+ AEK_IWMMXT = 1ULL << 60,
+ AEK_IWMMXT2 = 1ULL << 61,
+ AEK_MAVERICK = 1ULL << 62,
+ AEK_XSCALE = 1ULL << 63,
};
// List of Arch Extension names.
@@ -59,7 +59,7 @@ enum ArchExtKind : unsigned {
struct ExtName {
const char *NameCStr;
size_t NameLength;
- unsigned ID;
+ uint64_t ID;
const char *Feature;
const char *NegFeature;
@@ -102,7 +102,7 @@ template <typename T> struct CpuNames {
size_t NameLength;
T ArchID;
bool Default; // is $Name the default CPU for $ArchID ?
- unsigned DefaultExtensions;
+ uint64_t DefaultExtensions;
StringRef getName() const { return StringRef(NameCStr, NameLength); }
};
@@ -193,7 +193,7 @@ template <typename T> struct ArchNames {
const char *SubArchCStr;
size_t SubArchLength;
unsigned DefaultFPU;
- unsigned ArchBaseExtensions;
+ uint64_t ArchBaseExtensions;
T ID;
ARMBuildAttrs::CPUArch ArchAttr; // Arch ID in build attributes.
@@ -225,33 +225,33 @@ FPURestriction getFPURestriction(unsigned FPUKind);
// FIXME: These should be moved to TargetTuple once it exists
bool getFPUFeatures(unsigned FPUKind, std::vector<StringRef> &Features);
-bool getHWDivFeatures(unsigned HWDivKind, std::vector<StringRef> &Features);
-bool getExtensionFeatures(unsigned Extensions,
+bool getHWDivFeatures(uint64_t HWDivKind, std::vector<StringRef> &Features);
+bool getExtensionFeatures(uint64_t Extensions,
std::vector<StringRef> &Features);
StringRef getArchName(ArchKind AK);
unsigned getArchAttr(ArchKind AK);
StringRef getCPUAttr(ArchKind AK);
StringRef getSubArch(ArchKind AK);
-StringRef getArchExtName(unsigned ArchExtKind);
+StringRef getArchExtName(uint64_t ArchExtKind);
StringRef getArchExtFeature(StringRef ArchExt);
bool appendArchExtFeatures(StringRef CPU, ARM::ArchKind AK, StringRef ArchExt,
std::vector<StringRef> &Features);
-StringRef getHWDivName(unsigned HWDivKind);
+StringRef getHWDivName(uint64_t HWDivKind);
// Information by Name
unsigned getDefaultFPU(StringRef CPU, ArchKind AK);
-unsigned getDefaultExtensions(StringRef CPU, ArchKind AK);
+uint64_t getDefaultExtensions(StringRef CPU, ArchKind AK);
StringRef getDefaultCPU(StringRef Arch);
StringRef getCanonicalArchName(StringRef Arch);
StringRef getFPUSynonym(StringRef FPU);
StringRef getArchSynonym(StringRef Arch);
// Parser
-unsigned parseHWDiv(StringRef HWDiv);
+uint64_t parseHWDiv(StringRef HWDiv);
unsigned parseFPU(StringRef FPU);
ArchKind parseArch(StringRef Arch);
-unsigned parseArchExt(StringRef ArchExt);
+uint64_t parseArchExt(StringRef ArchExt);
ArchKind parseCPUArch(StringRef CPU);
ISAKind parseArchISA(StringRef Arch);
EndianKind parseArchEndian(StringRef Arch);
diff --git a/llvm/lib/Support/ARMTargetParser.cpp b/llvm/lib/Support/ARMTargetParser.cpp
index f2c22fd93c8b..12284aff1729 100644
--- a/llvm/lib/Support/ARMTargetParser.cpp
+++ b/llvm/lib/Support/ARMTargetParser.cpp
@@ -367,11 +367,11 @@ unsigned ARM::getDefaultFPU(StringRef CPU, ARM::ArchKind AK) {
.Default(ARM::FK_INVALID);
}
-unsigned ARM::getDefaultExtensions(StringRef CPU, ARM::ArchKind AK) {
+uint64_t ARM::getDefaultExtensions(StringRef CPU, ARM::ArchKind AK) {
if (CPU == "generic")
return ARM::ARCHNames[static_cast<unsigned>(AK)].ArchBaseExtensions;
- return StringSwitch<unsigned>(CPU)
+ return StringSwitch<uint64_t>(CPU)
#define ARM_CPU_NAME(NAME, ID, DEFAULT_FPU, IS_DEFAULT, DEFAULT_EXT) \
.Case(NAME, \
ARCHNames[static_cast<unsigned>(ArchKind::ID)].ArchBaseExtensions | \
@@ -380,7 +380,7 @@ unsigned ARM::getDefaultExtensions(StringRef CPU, ARM::ArchKind AK) {
.Default(ARM::AEK_INVALID);
}
-bool ARM::getHWDivFeatures(unsigned HWDivKind,
+bool ARM::getHWDivFeatures(uint64_t HWDivKind,
std::vector<StringRef> &Features) {
if (HWDivKind == AEK_INVALID)
@@ -399,7 +399,7 @@ bool ARM::getHWDivFeatures(unsigned HWDivKind,
return true;
}
-bool ARM::getExtensionFeatures(unsigned Extensions,
+bool ARM::getExtensionFeatures(uint64_t Extensions,
std::vector<StringRef> &Features) {
if (Extensions == AEK_INVALID)
@@ -431,7 +431,7 @@ unsigned ARM::getArchAttr(ARM::ArchKind AK) {
return ARCHNames[static_cast<unsigned>(AK)].ArchAttr;
}
-StringRef ARM::getArchExtName(unsigned ArchExtKind) {
+StringRef ARM::getArchExtName(uint64_t ArchExtKind) {
for (const auto AE : ARCHExtNames) {
if (ArchExtKind == AE.ID)
return AE.getName();
@@ -486,20 +486,13 @@ static unsigned findDoublePrecisionFPU(unsigned InputFPUKind) {
return ARM::FK_INVALID;
}
-static unsigned getAEKID(StringRef ArchExtName) {
- for (const auto AE : ARM::ARCHExtNames)
- if (AE.getName() == ArchExtName)
- return AE.ID;
- return ARM::AEK_INVALID;
-}
-
bool ARM::appendArchExtFeatures(
StringRef CPU, ARM::ArchKind AK, StringRef ArchExt,
std::vector<StringRef> &Features) {
size_t StartingNumFeatures = Features.size();
const bool Negated = stripNegationPrefix(ArchExt);
- unsigned ID = getAEKID(ArchExt);
+ uint64_t ID = parseArchExt(ArchExt);
if (ID == AEK_INVALID)
return false;
@@ -532,7 +525,7 @@ bool ARM::appendArchExtFeatures(
return StartingNumFeatures != Features.size();
}
-StringRef ARM::getHWDivName(unsigned HWDivKind) {
+StringRef ARM::getHWDivName(uint64_t HWDivKind) {
for (const auto D : HWDivNames) {
if (HWDivKind == D.ID)
return D.getName();
@@ -555,7 +548,7 @@ StringRef ARM::getDefaultCPU(StringRef Arch) {
return "generic";
}
-unsigned ARM::parseHWDiv(StringRef HWDiv) {
+uint64_t ARM::parseHWDiv(StringRef HWDiv) {
StringRef Syn = getHWDivSynonym(HWDiv);
for (const auto D : HWDivNames) {
if (Syn == D.getName())
@@ -564,7 +557,7 @@ unsigned ARM::parseHWDiv(StringRef HWDiv) {
return AEK_INVALID;
}
-unsigned ARM::parseArchExt(StringRef ArchExt) {
+uint64_t ARM::parseArchExt(StringRef ArchExt) {
for (const auto A : ARCHExtNames) {
if (ArchExt == A.getName())
return A.ID;
diff --git a/llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp b/llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
index 992b8755384c..19959ad10a31 100644
--- a/llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
+++ b/llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
@@ -11726,7 +11726,7 @@ bool ARMAsmParser::parseDirectiveArchExtension(SMLoc L) {
// when we start to table-generate them, and we can use the ARM
// flags below, that were generated by table-gen.
static const struct {
- const unsigned Kind;
+ const uint64_t Kind;
const FeatureBitset ArchCheck;
const FeatureBitset Features;
} Extensions[] = {
@@ -11775,7 +11775,7 @@ bool ARMAsmParser::parseDirectiveArchExtension(SMLoc L) {
EnableFeature = false;
Name = Name.substr(2);
}
- unsigned FeatureKind = ARM::parseArchExt(Name);
+ uint64_t FeatureKind = ARM::parseArchExt(Name);
if (FeatureKind == ARM::AEK_INVALID)
return Error(ExtLoc, "unknown architectural extension: " + Name);
diff --git a/llvm/unittests/Support/TargetParserTest.cpp b/llvm/unittests/Support/TargetParserTest.cpp
index 32d0924cd8bb..dbdaedd3892d 100644
--- a/llvm/unittests/Support/TargetParserTest.cpp
+++ b/llvm/unittests/Support/TargetParserTest.cpp
@@ -32,14 +32,14 @@ const char *ARMArch[] = {
};
bool testARMCPU(StringRef CPUName, StringRef ExpectedArch,
- StringRef ExpectedFPU, unsigned ExpectedFlags,
+ StringRef ExpectedFPU, uint64_t ExpectedFlags,
StringRef CPUAttr) {
ARM::ArchKind AK = ARM::parseCPUArch(CPUName);
bool pass = ARM::getArchName(AK).equals(ExpectedArch);
unsigned FPUKind = ARM::getDefaultFPU(CPUName, AK);
pass &= ARM::getFPUName(FPUKind).equals(ExpectedFPU);
- unsigned ExtKind = ARM::getDefaultExtensions(CPUName, AK);
+ uint64_t ExtKind = ARM::getDefaultExtensions(CPUName, AK);
if (ExtKind > 1 && (ExtKind & ARM::AEK_NONE))
pass &= ((ExtKind ^ ARM::AEK_NONE) == ExpectedFlags);
else
@@ -565,7 +565,7 @@ TEST(TargetParserTest, ARMFPURestriction) {
}
TEST(TargetParserTest, ARMExtensionFeatures) {
- std::map<unsigned, std::vector<StringRef>> Extensions;
+ std::map<uint64_t, std::vector<StringRef>> Extensions;
for (auto &Ext : ARM::ARCHExtNames) {
if (Ext.Feature && Ext.NegFeature)
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