[llvm] 8ead5df - [X86] computeKnownBitsForTargetNode - add BEXTR support (PR39153)

Simon Pilgrim via llvm-commits llvm-commits at lists.llvm.org
Mon Feb 3 07:44:38 PST 2020


Author: Simon Pilgrim
Date: 2020-02-03T15:43:59Z
New Revision: 8ead5df0b1197daf4cd5ed5d990a43d62c3cf43e

URL: https://github.com/llvm/llvm-project/commit/8ead5df0b1197daf4cd5ed5d990a43d62c3cf43e
DIFF: https://github.com/llvm/llvm-project/commit/8ead5df0b1197daf4cd5ed5d990a43d62c3cf43e.diff

LOG: [X86] computeKnownBitsForTargetNode - add BEXTR support (PR39153)

Add a KnownBits::extractBits helper

Added: 
    

Modified: 
    llvm/include/llvm/Support/KnownBits.h
    llvm/lib/Target/X86/X86ISelLowering.cpp
    llvm/test/CodeGen/X86/combine-bextr.ll

Removed: 
    


################################################################################
diff  --git a/llvm/include/llvm/Support/KnownBits.h b/llvm/include/llvm/Support/KnownBits.h
index ff25b6fc572c..1d926bd30416 100644
--- a/llvm/include/llvm/Support/KnownBits.h
+++ b/llvm/include/llvm/Support/KnownBits.h
@@ -157,6 +157,13 @@ struct KnownBits {
     return KnownBits(Zero.zextOrTrunc(BitWidth), One.zextOrTrunc(BitWidth));
   }
 
+  /// Return a KnownBits with the extracted bits
+  /// [bitPosition,bitPosition+numBits).
+  KnownBits extractBits(unsigned NumBits, unsigned BitPosition) const {
+    return KnownBits(Zero.extractBits(NumBits, BitPosition),
+                     One.extractBits(NumBits, BitPosition));
+  }
+
   /// Returns the minimum number of trailing zero bits.
   unsigned countMinTrailingZeros() const {
     return Zero.countTrailingOnes();

diff  --git a/llvm/lib/Target/X86/X86ISelLowering.cpp b/llvm/lib/Target/X86/X86ISelLowering.cpp
index a5ea60f8968e..f74c255340b9 100644
--- a/llvm/lib/Target/X86/X86ISelLowering.cpp
+++ b/llvm/lib/Target/X86/X86ISelLowering.cpp
@@ -32721,6 +32721,28 @@ void X86TargetLowering::computeKnownBitsForTargetNode(const SDValue Op,
     Known.Zero &= Known2.Zero;
     break;
   }
+  case X86ISD::BEXTR: {
+    SDValue Op0 = Op.getOperand(0);
+    SDValue Op1 = Op.getOperand(1);
+
+    if (auto* Cst1 = dyn_cast<ConstantSDNode>(Op1)) {
+      unsigned Shift = Cst1->getAPIntValue().extractBitsAsZExtValue(8, 0);
+      unsigned Length = Cst1->getAPIntValue().extractBitsAsZExtValue(8, 8);
+
+      // If the length is 0, the result is 0.
+      if (Length == 0) {
+        Known.setAllZero();
+        break;
+      }
+
+      if ((Shift + Length) <= BitWidth) {
+        Known = DAG.computeKnownBits(Op0, Depth + 1);
+        Known = Known.extractBits(Length, Shift);
+        Known = Known.zextOrTrunc(BitWidth, true /* ExtBitsAreKnownZero */);
+      }
+    }
+    break;
+  }
   }
 
   // Handle target shuffles.

diff  --git a/llvm/test/CodeGen/X86/combine-bextr.ll b/llvm/test/CodeGen/X86/combine-bextr.ll
index 3cfcb145e167..d4763b3f076c 100644
--- a/llvm/test/CodeGen/X86/combine-bextr.ll
+++ b/llvm/test/CodeGen/X86/combine-bextr.ll
@@ -62,7 +62,7 @@ define float @bextr_uitofp(i32 %x, i32 %y) {
 ; X64:       # %bb.0:
 ; X64-NEXT:    movl $3855, %eax # imm = 0xF0F
 ; X64-NEXT:    bextrl %eax, %edi, %eax
-; X64-NEXT:    cvtsi2ss %rax, %xmm0
+; X64-NEXT:    cvtsi2ss %eax, %xmm0
 ; X64-NEXT:    retq
   %1 = tail call i32 @llvm.x86.bmi.bextr.32(i32 %x, i32 3855)
   %2 = uitofp i32 %1 to float


        


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