[llvm] 75d9994 - Fix broken invariant

[Guillaume Chatelet via llvm-commits]

Author: Guillaume Chatelet
Date: 2020-02-03T11:01:05+01:00
New Revision: 75d9994a51282728e7dd2acba33f50f1cfdf7294

URL: https://github.com/llvm/llvm-project/commit/75d9994a51282728e7dd2acba33f50f1cfdf7294
DIFF: https://github.com/llvm/llvm-project/commit/75d9994a51282728e7dd2acba33f50f1cfdf7294.diff

LOG: Fix broken invariant

Summary:
A Copy with a source that is zeros is the same as a Set of zeros.
This fixes the invariant that SrcAlign should always be non-null.

Reviewers: courbet

Subscribers: hiraditya, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D73791

Added: 
    

Modified: 
    llvm/include/llvm/CodeGen/TargetLowering.h
    llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
    llvm/test/CodeGen/AArch64/memcpy-f128.ll

Removed: 
    


################################################################################
diff  --git a/llvm/include/llvm/CodeGen/TargetLowering.h b/llvm/include/llvm/CodeGen/TargetLowering.h
index 55967b32bce7..2b0de2e712c8 100644
--- a/llvm/include/llvm/CodeGen/TargetLowering.h
+++ b/llvm/include/llvm/CodeGen/TargetLowering.h
@@ -125,6 +125,8 @@ struct MemOp {
   static MemOp Copy(uint64_t Size, bool DstAlignCanChange, unsigned DstAlign,
                     unsigned SrcAlign, bool IsVolatile,
                     bool MemcpyStrSrc = false) {
+    assert(DstAlign && "Destination alignment should be set");
+    assert(SrcAlign && "Source alignment should be set");
     return {
         /*.Size =*/Size,
         /*.DstAlign =*/DstAlignCanChange ? 0 : DstAlign,
@@ -137,6 +139,7 @@ struct MemOp {
   }
   static MemOp Set(uint64_t Size, bool DstAlignCanChange, unsigned DstAlign,
                    bool IsZeroMemset, bool IsVolatile) {
+    assert(DstAlign && "Destination alignment should be set");
     return {
         /*.Size =*/Size,
         /*.DstAlign =*/DstAlignCanChange ? 0 : DstAlign,

diff  --git a/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp b/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
index b25aad0d9ef6..b72e72661c25 100644
--- a/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
+++ b/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
@@ -5908,12 +5908,14 @@ static SDValue getMemcpyLoadsAndStores(SelectionDAG &DAG, const SDLoc &dl,
   bool CopyFromConstant = isMemSrcFromConstant(Src, Slice);
   bool isZeroConstant = CopyFromConstant && Slice.Array == nullptr;
   unsigned Limit = AlwaysInline ? ~0U : TLI.getMaxStoresPerMemcpy(OptSize);
+  const MemOp Op = isZeroConstant
+                       ? MemOp::Set(Size, DstAlignCanChange, Alignment,
+                                    /*IsZeroMemset*/ true, isVol)
+                       : MemOp::Copy(Size, DstAlignCanChange, Alignment,
+                                     SrcAlign, isVol, CopyFromConstant);
   if (!TLI.findOptimalMemOpLowering(
-          MemOps, Limit,
-          MemOp::Copy(Size, DstAlignCanChange, Alignment,
-                      isZeroConstant ? 0 : SrcAlign, isVol, CopyFromConstant),
-          DstPtrInfo.getAddrSpace(), SrcPtrInfo.getAddrSpace(),
-          MF.getFunction().getAttributes()))
+          MemOps, Limit, Op, DstPtrInfo.getAddrSpace(),
+          SrcPtrInfo.getAddrSpace(), MF.getFunction().getAttributes()))
     return SDValue();
 
   if (DstAlignCanChange) {

diff  --git a/llvm/test/CodeGen/AArch64/memcpy-f128.ll b/llvm/test/CodeGen/AArch64/memcpy-f128.ll
index 8b91b8431087..bc6ffb140aa4 100644
--- a/llvm/test/CodeGen/AArch64/memcpy-f128.ll
+++ b/llvm/test/CodeGen/AArch64/memcpy-f128.ll
@@ -7,9 +7,6 @@
 
 define void @test1() {
 ; CHECK-LABEL: @test1
-; CHECK: adrp
-; CHECK: ldr q0
-; CHECK: str q0
 ; CHECK: ret
 entry:
   tail call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 8 undef, i8* align 8 bitcast (%structA* @stubA to i8*), i64 48, i1 false)