[PATCH] D72944: [InstCombine] Fix worklist management when simplifying demanded bits (PR44541)

[Nikita Popov via Phabricator via llvm-commits]

nikic planned changes to this revision.
nikic added a comment.

This should be using `AddDeferred` now. But if we do that, we run into https://bugs.llvm.org/show_bug.cgi?id=44754. Additionally, we don't get the desired number of iterations anymore until D73803 <https://reviews.llvm.org/D73803> and followup work will shake out (a dangling "not" is not getting DCEd and blocks transforms)...


Repository:
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  https://reviews.llvm.org/D72944/new/

https://reviews.llvm.org/D72944