[llvm] 792d9b5 - DAG: Check if a value is divergent before requiresUniformRegister
Matt Arsenault via llvm-commits
llvm-commits at lists.llvm.org
Fri Jan 31 15:27:30 PST 2020
Author: Matt Arsenault
Date: 2020-01-31T15:27:18-08:00
New Revision: 792d9b57194e51e9cc6805676b082932abeeede0
URL: https://github.com/llvm/llvm-project/commit/792d9b57194e51e9cc6805676b082932abeeede0
DIFF: https://github.com/llvm/llvm-project/commit/792d9b57194e51e9cc6805676b082932abeeede0.diff
LOG: DAG: Check if a value is divergent before requiresUniformRegister
This avoids a potentially expensive scan if we already know it doesn't
matter.
Added:
Modified:
llvm/lib/CodeGen/SelectionDAG/FunctionLoweringInfo.cpp
Removed:
################################################################################
diff --git a/llvm/lib/CodeGen/SelectionDAG/FunctionLoweringInfo.cpp b/llvm/lib/CodeGen/SelectionDAG/FunctionLoweringInfo.cpp
index fa33400cd4b3..09e4af1b9012 100644
--- a/llvm/lib/CodeGen/SelectionDAG/FunctionLoweringInfo.cpp
+++ b/llvm/lib/CodeGen/SelectionDAG/FunctionLoweringInfo.cpp
@@ -387,8 +387,8 @@ unsigned FunctionLoweringInfo::CreateRegs(Type *Ty, bool isDivergent) {
}
unsigned FunctionLoweringInfo::CreateRegs(const Value *V) {
- return CreateRegs(V->getType(), DA && !TLI->requiresUniformRegister(*MF, V) &&
- DA->isDivergent(V));
+ return CreateRegs(V->getType(), DA && DA->isDivergent(V) &&
+ !TLI->requiresUniformRegister(*MF, V));
}
/// GetLiveOutRegInfo - Gets LiveOutInfo for a register, returning NULL if the
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