[PATCH] D73064: [LoopCacheAnalysis]: Add support for negative stride

[Rachel Craik via Phabricator via llvm-commits]

rcraik added a comment.

I took each of these example loops and, taking `N = 1024`, ran each loop 10 000 000 times. These testcases I ran 10 times each and found no statistical difference between either the number of L1 <https://reviews.llvm.org/L1> cache load misses or the L1 <https://reviews.llvm.org/L1> cache miss rate between each testcase. This indicates that the cost of these loops is the same, which is what this patch implements.



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Comment at: llvm/lib/Analysis/LoopCacheAnalysis.cpp:381
+                                    AccessFnAR->getNoWrapFlags());
+      }
       const SCEV *Div = SE.getUDivExactExpr(AccessFn, ElemSize);
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jdoerfert wrote:
> No braces.
I checked the LLVM Coding Standards, and it doesn't mention braces vs no braces for single statement if/for/etc. blocks. Since this statement covers multiple lines, I would rather keep the braces for clarity.


CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D73064/new/

https://reviews.llvm.org/D73064