[PATCH] D73749: [LegalizeTypes][X86] Add a new strategy for type legalizing f16 type that softens it to i16, but promotes to f32 around arithmetic ops.

[Eli Friedman via Phabricator via llvm-commits]

efriedma accepted this revision.
efriedma added a comment.
This revision is now accepted and ready to land.

LGTM



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Comment at: llvm/test/CodeGen/X86/vector-half-conversions.ll:512
+; ALL-NEXT:    vmovdqa -{{[0-9]+}}(%rsp), %xmm0
+; ALL-NEXT:    vmovdqa -{{[0-9]+}}(%rsp), %xmm1
+; ALL-NEXT:    vmovdqa -{{[0-9]+}}(%rsp), %xmm2
----------------
Sort of a side-note, but it might make sense to make half "legal" on targets with vcvtph2ps .


Repository:
  rG LLVM Github Monorepo

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  https://reviews.llvm.org/D73749/new/

https://reviews.llvm.org/D73749